Integrated circuit module with a structurally balanced package using a bottom side interposer

US11664302B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11664302-B2
Application numberUS-202017128023-A
CountryUS
Kind codeB2
Filing dateDec 19, 2020
Priority dateNov 30, 2018
Publication dateMay 30, 2023
Grant dateMay 30, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A bottom side interposer provides a structurally balanced chip carrier module to reduce thermal warp and increase package robustness. The bottom side interposer is attached to the bottom of a chip carrier which carries semiconductor chips on the top side of the chip carrier. The top side of the chip carrier typically includes a top side interposer between the semiconductor chips and the chip carrier. The bottom side interposer has a coefficient of thermal expansion (CTE) that is similar to the chips and top side interposer, or tailored to have a CTE intermediate to the chips and the chip carrier. Pads on the bottom side interposer may be plated or fitted with solder balls to complete the module so the module can be connected to a printed circuit board.

First claim

Opening claim text (preview).

The invention claimed is: 1. An article of manufacture comprising: a chip carrier; a bottom side interposer attached to a bottom side of the chip carrier wherein the bottom side interposer comprises a layer of material chosen from silicon, glass, and low coefficient thermal expansion organic composite materials, wherein the bottom side interposer is attached to the chip carrier by applying transient liquid metal paste deposits to a surface between the bottom side interposer and the chip carrier, adding a lamination adhesive sheet, and flowing the transient liquid metal paste while simultaneously bonding the lamination adhesive sheet; at least one semiconductor chip attached to a top side of the chip carrier; and wherein a coefficient of thermal expansion of the bottom side interposer is between a coefficient of thermal expansion of the at least one semiconductor chip and a coefficient of thermal expansion of the chip carrier. 2. The article of manufacture of claim 1 wherein the coefficient of thermal expansion of the bottom side interposer is substantially the same as the coefficient of thermal expansion of the at least one semiconductor chip. 3. The article of manufacture of claim 1 further comprising a top side interposer layer between the chip carrier and the at least one semiconductor chip and wherein a coefficient of thermal expansion of the top side interposer layer is substantially the same as the coefficient of thermal expansion of the bottom side interposer. 4. The article of manufacture of claim 1 wherein the bottom side interposer is attached to the chip carrier with the transient liquid metal paste deposits and the lamination adhesive sheet. 5. The article of manufacture of claim 4 wherein the bottom side interposer is attached to the chip carrier using a ball grid array. 6. The article of manufacture of claim 4 wherein the bottom side interposer is attached to the chip carrier using a land grid array. 7. The article of manufacture of claim 1 wherein the bottom side interposer is underfilled. 8. The article of manufacture of claim 1 wherein the top side interposer is attached with the transient liquid metal paste deposits and the lamination adhesive sheet. 9. An article of manufacture, comprising: a bottom side interposer attached to a bottom side of a chip carrier by: a lamination adhesive sheet; and a transient liquid metal paste deposited to a surface between the bottom side interposer and the chip carrier, wherein the transient liquid metal paste was flowed while simultaneously bonding the lamination adhesive sheet; a top side interposer layer attached to a top side of the chip carrier; and at least one semiconductor chip attached to the top side of the chip carrier; wherein a coefficient of thermal expansion of the bottom side interposer is substantially the same as the coefficient of thermal expansion of the top side interposer layer and the at least one semiconductor chip; and wherein the bottom side interposer comprises a layer of material chosen from silicon and glass. 10. The article of manufacture of claim 9 , wherein the chip carrier is an organic module laminate. 11. The article of manufacture of claim 9 , wherein the at least one semiconductor chip is adapted for attachment to a printed circuit board. 12. An article of manufacture comprising: a chip carrier; an underfilled bottom side interposer attached to a bottom side of the chip carrier, wherein the underfilled bottom side interposer comprises a layer of material chosen from silicon and glass; at least one semiconductor chip attached to a top side of the chip carrier; and a top side interposer layer attached between the chip carrier and the at least one semiconductor chip, wherein the top side interposer layer is covered with a lid; wherein a coefficient of thermal expansion of the underfilled bottom side interposer is between a coefficient of thermal expansion of the at least one semiconductor chip and a coefficient of thermal expansion of the chip carrier; and wherein a coefficient of thermal expansion between the top side interposer layer is substantially the same as the coefficient of expansion of the underfilled bottom side interposer. 13. The article of manufacture of claim 12 , wherein a bottom side of the underfilled bottom side interposer is adapted for attachment to a printed circuit board using a ball grid array. 14. The article of manufacture of claim 12 , wherein a bottom side of the underfilled bottom side interposer is adapted for attachment to a printed circuit board using a land grid array. 15. The article of manufacture of claim 14 , wherein the at least one semiconductor chip is attached to the printed circuit board.

Assignees

Inventors

Classifications

  • Semiconductor materials that are electrically insulating, e.g. undoped silicon · CPC title

  • Organic materials · CPC title

  • Ceramics or glasses · CPC title

  • H10W70/098Primary

    Applying pastes or inks, e.g. screen printing (H10W70/095 takes precedence) · CPC title

  • the encapsulations exposing the passive side of the semiconductor body · CPC title

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Frequently asked questions

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What does patent US11664302B2 cover?
A bottom side interposer provides a structurally balanced chip carrier module to reduce thermal warp and increase package robustness. The bottom side interposer is attached to the bottom of a chip carrier which carries semiconductor chips on the top side of the chip carrier. The top side of the chip carrier typically includes a top side interposer between the semiconductor chips and the chip ca…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10W70/098. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 30 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).