Semiconductor device and manufacturing method of the same

Patent metadata

Field	Value
Publication number	US-11616066-B2
Application number	US-202117384347-A
Country	US
Kind code	B2
Filing date	Jul 23, 2021
Priority date	Aug 29, 2019
Publication date	Mar 28, 2023
Grant date	Mar 28, 2023

Abstract

A semiconductor device includes: an active region defined by a device isolation layer formed in a substrate; a word line configured to cross the active region, the word line extending in a first direction and being formed in the substrate; a bit line extending in a second direction perpendicular to the first direction on the word line; a first contact connecting the bit line to the active region; a first mask for forming the active region, the first mask being formed on the active region; and a second mask of which a height of a top surface thereof is greater than a height of a top surface of the active region, the second mask covering the word line, wherein the active region has a bar shape that extends to form an acute angle with respect to the first direction.

First claim

What is claimed is:

1. A semiconductor device comprising:
an active region defined by a device isolation layer formed in a substrate;
a word line configured to cross the active region, the word line extending in a first direction and being formed in the substrate;
a bit line extending in a second direction perpendicular to the first direction on the word line;
a first contact connecting the bit line to the active region;
a first mask for forming the active region, the first mask being formed on the active region; and
a second mask covering the word line,
wherein the active region has a bar shape that extends in an oblique direction to form an acute angle with respect to the first direction,
wherein a width of the first contact in the first direction is shortest at a center in the second direction.

2. The semiconductor device of claim 1 , wherein:
the first contact has a concave shape at both sides in the first direction.

3. The semiconductor device of claim 1 , wherein:
the first contact contacts a center of the active area in the oblique direction.

4. The semiconductor device of claim 1 , wherein:
the first contact has a shape in which a width in the oblique direction narrows toward a bottom portion of the first contact.

5. The semiconductor device of claim 1 , wherein the first mask is one of a plurality of first masks, and further comprising:
a buffer insulating layer on the device isolation layer between adjacent two of the first masks in the first direction.

6. The semiconductor device of claim 5 , wherein:
the buffer insulating layer is also arranged on a gate insulating layer adjacent to both sides of the two of the first masks in the second direction, and
the two of first masks and the buffer insulating layer constitute a first mask structure.

7. The semiconductor device of claim 1 , further comprising a second contact penetrating the first mask and connecting the active region and a capacitor above the bit line.

8. The semiconductor device of claim 1 , wherein:
the first contact, when viewed from a top surface thereof, has any one shape of a circular type, an elliptical type, a parallelogram type, and a line type.

9. The semiconductor device of claim 1 , wherein the first contact, when viewed from a top surface thereof, has one of the following shapes:
a circular type or an elliptic type shape,
a shape concaved inwardly at both ends in the first and second directions,
a shape that extends in an extending direction of the active region while extending to a portion of the word line in two opposite directions, and
a shape that extends in the extending direction of the active region while extending to cover an entirety of two word lines in the second direction.

10. The semiconductor device of claim 1 , wherein:
both sides of the first contact in the first direction are surrounded by the first mask, and
both sides of the first contact in the second direction are surrounded by the second mask.

11. A semiconductor device comprising:
an active region defined by a device isolation layer formed in a substrate;
a word line configured to cross the active region, the word line extending in a first direction and being formed in the substrate;
a bit line extending in a second direction perpendicular to the first direction on the word line;
a contact connecting the bit line to the active region;
a first mask for forming the active region, the first mask being formed on the active region; and
a second mask covering the word line,
wherein the active region has a bar shape that extends in an oblique direction to form an acute angle with respect to the first direction,
wherein both sides of the contact in the second direction are surrounded by the second mask.

12. The semiconductor device of claim 11 , wherein:
a top surface of the second mask has substantially the same height as a top surface of the first mask.

13. The semiconductor device of claim 11 , wherein:
both sides of the contact in the first direction are surrounded by the first mask.

14. The semiconductor device of claim 11 , wherein:
the contact has a concave shape at both sides in the first direction.

15. The semiconductor device of claim 11 , wherein the first mask is one of a plurality of first masks, and further comprising:
a buffer insulating layer on the device isolation layer between adjacent two of the first masks in the first direction,
wherein the two of the first masks and the buffer insulating layer constitute a first mask structure.

16. A semiconductor device comprising:
an active region defined by a device isolation layer formed in a substrate;
a word line configured to cross the active region, the word line extending in a first direction and being formed in the substrate;
a bit line extending in a second direction perpendicular to the first direction on the word line;
a contact connecting the bit line to the active region;
a first mask for forming the active region, the first mask being formed on the active region; and
a second mask covering the word line,
wherein the active region has a bar shape that extends in an oblique direction to form an acute angle with respect to the first direction,
wherein both sides of the contact in the first direction have a shape corresponding to the shape of the first mask.

17. The semiconductor device of claim 16 , wherein:
an outer part of the first mask in the first direction has a shape similar to a part of a circle or an ellipse, and
the both sides of the contact in the first direction have a concave shape corresponding to the first mask.

18. The semiconductor device of claim 16 , wherein:
the both sides of the contact in the first direction are surrounded by the first mask, and
both sides of the contact in the second direction are surrounded by the second mask.

19. The semiconductor device of claim 16 , wherein:
wherein a width of the contact in the first direction is shortest at a center in the second direction.

20. The semiconductor device of claim 16 , wherein:
a top surface of the second mask has substantially the same height as a top surface of the first mask.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Hyosub
• Kim Keunnam
• Kim Dongoh
• Kim Bongsoo
• Kim Euna
• Yoon Chansic
• Lee Kiseok
• Jung Hyeonok
• Han Sunghee
• Hwang Yoosang

Classifications

• H10W20/435

  Cross-sectional shapes or dispositions of interconnections · CPC title

• H10D84/0126

  the components including insulated gates, e.g. IGFETs · CPC title

• H10B12/315 Primary

  with the capacitor higher than a bit line · CPC title

• H10B12/053

  the transistor being at least partially in a trench in the substrate (vertical transistor in combination with a capacitor formed in a substrate trench H10B12/0383) · CPC title

• H10B12/488

  Word lines · CPC title