Thermistor die-based thermal probe

Patent metadata

Field	Value
Publication number	US-11525739-B2
Application number	US-201815973964-A
Country	US
Kind code	B2
Filing date	May 8, 2018
Priority date	May 8, 2018
Publication date	Dec 13, 2022
Grant date	Dec 13, 2022

Abstract

A thermistor-based thermal probe includes a thermistor die having a thermistor thereon with first and second bond pads coupled across the thermistor, and first and second die interconnects coupled to the respective bond pads. First and second wires W 1 , W 2 that extend beyond the thermistor die are attached to the first and to the second die interconnects, respectively. An encapsulant material encapsulates the thermistor die and a die end of the first and second wires.

First claim

The invention claimed is:

1. A method of fabricating a thermistor-based thermal probe, comprising:
providing a first die interconnect and a second die interconnect coupled to first and second bond pads that are coupled across a thermistor on a thermistor die;
directly attaching first and second wires to the first interconnect and to the second die interconnect, wherein the first and second wires extend a distance beyond the thermistor die; and
forming an encapsulating material over the thermistor die and a die end of the first and second wires.

2. The method of claim 1 , wherein the thermistor die comprises a silicon substrate, and wherein the first and second bond pads are both on a same side of the silicon substrate.

3. The method of claim 1 , wherein the first die interconnect and the second die interconnect comprise solder.

4. The method of claim 1 , wherein the thermistor has a 25° C. minimum temperature coefficient of 3,000 parts per million per ° C.

5. A method of fabricating a thermistor-based thermal probe, comprising:
attaching a first die interconnect and a second die interconnect coupled to first and second bond pads that are coupled across a thermistor on a thermistor die to a first trace and to a second trace on a mounting substrate;
forming first and second wire interconnects on the mounting substrate and then attaching first and second wires to the first and second traces using the first and second wire interconnects, wherein the first and second wires extend beyond the mounting substrate, and
forming an encapsulating material over the thermistor die, the mounting substrate, and a die end of the first and second wires.

6. The method of claim 5 , wherein the thermistor die comprises a silicon substrate, and wherein the first and second bond pads are both on a same side of the silicon substrate.

7. The method of claim 5 , wherein the providing further comprises providing another die including signal processing circuitry, wherein the method further comprises attaching bond pads of the another die to other traces on the mounting substrate that couple to other bond pads on the thermistor die to form a voltage divider including the thermistor and couple the signal processing circuitry to receive an output from the voltage divider.

8. The method of claim 5 , wherein the mounting substrate comprise a flexible polymer comprising substrate.

9. The method of claim 5 , wherein the thermistor has a 25° C. minimum temperature coefficient of at least 3,000 parts per million per ° C.

10. The method of claim 5 , wherein the first and second wires are coupled to the first and second traces by solder balls.

11. A thermistor-based thermal probe, comprising:
thermistor die having a thermistor thereon with first and second bond pads coupled across the thermistor, and with first die interconnect and a second die interconnect coupled to bond pads;
first and second wires that extend beyond the thermistor die attached to the first interconnect and to the second die interconnect; and
an encapsulating material over the thermistor die, and a die end of the first and second wires.

12. The thermistor-based thermal probe of claim 11 , wherein the thermistor die comprises a silicon substrate, and wherein the first and second bond pads are on a same side of the silicon substrate.

13. A thermistor-based thermal probe, comprising:
thermistor die having a thermistor thereon with first and second bond pads coupled across the thermistor, and with first die interconnect and a second die interconnect coupled to bond pads, wherein the first die interconnect and the second die interconnect comprise solder;
first and second wires that extend beyond the thermistor die attached to the first interconnect and to the second die interconnect; and
an encapsulating material over the thermistor die, and a die end of the first and second wires.

14. The thermistor-based thermal probe of claim 11 , wherein the thermistor has a 25° C. minimum temperature coefficient of at least 3,000 parts per million per ° C.

15. A thermistor-based thermal probe, comprising
a mounting substrate and a thermistor die having a thermistor thereon with first and second bond pads coupled across the thermistor;
first and second die interconnects coupled to the first and the second bond pads, wherein the first and second die interconnects are coupled to a first and a second trace on the mounting substrate;
first and second wires that extend beyond the mounting substrate attached to the first and second traces by first and second wire interconnects on the mounting substrate, and
an encapsulating material over the thermistor die, the mounting substrate, and a die end of the first and second wires.

16. The probe of claim 15 , wherein the thermistor die comprises a silicon substrate, and wherein the first and second bond pads are on a same side of the silicon substrate.

17. The probe of claim 15 , further comprising another die including signal processing circuitry, wherein bond pads on the another die are attached to other traces on the mounting substrate that couple to other bond pads on the thermistor die to form a voltage divider including the thermistor and couple the signal processing circuitry to receive an output from the voltage divider.

18. The probe of claim 15 , wherein the mounting substrate comprise a flexible polymer comprising substrate.

19. The probe of claim 15 , wherein the thermistor has a 25° C. minimum temperature coefficient of 3,000 parts per million per ° C.

20. The probe of claim 15 , wherein the first and second wires are coupled to the first and second traces by solder balls.

21. The method of claim 1 , further comprising another die including signal processing circuitry, wherein bond pads on the another die are coupled to bond pads on the thermistor die to form a voltage divider including the thermistor and couple the signal processing circuitry to receive an output from the voltage divider.

22. The probe of claim 11 , further comprising another die including signal processing circuitry, wherein bond pads on the another die are coupled to bond pads on the thermistor die to form a voltage divider including the thermistor and couple the signal processing circuitry to receive an output from the voltage divider.

23. A method of fabricating a thermistor-based thermal probe, comprising:
providing a substrate;
forming a first trace and a second trace on the substrate;
attaching a thermistor die on the substrate, first and second bond pads on the thermistor die are coupled across a thermistor on a thermistor die;
coupling the first trace to the first bond pad via a first die interconnect;
coupling the second trace to the second bond pad via a second die interconnect;
coupling a first wire to the first trace;
coupling a second wire to the second trace, wherein the first and second wires extend beyond the mounting substrate; and
forming an encapsulating material over the thermistor die, the mounting substrate, and a die end of the first and second wires.

24. A thermistor-based thermal probe, comprising:
providing a substrate;
a first trace and a second trace on the substrate;
a thermistor die on the substrate, first and second bond pads on the thermistor die are coupled across a thermistor on a thermistor die;
a first die interconnect couples the first trace to the first bond pad;
a second die interconnect couples the second trace to the second bond pad;

Assignees

• Texas Instruments Inc

Inventors

• Romig Matthew David
• Kummerl Steven Aldred
• Harrell Steve Edward

Classifications

• H01C1/034

  the housing or enclosure being formed as coating or mould without outer sheath (H01C1/032 takes precedence) · CPC title

• H01C17/006

  adapted for manufacturing resistor chips · CPC title

• G01K7/24

  in a specially-adapted circuit, e.g. bridge circuit · CPC title

• H01C1/142

  the terminals or tapping points being coated on the resistive element · CPC title

• H01C7/008

  Thermistors (H01C7/02 - H01C7/06 take precedence) · CPC title