Method and apparatus for calculating kink current of SOI device

Patent metadata

Field	Value
Publication number	US-11442097-B2
Application number	US-201916959633-A
Country	US
Kind code	B2
Filing date	Jun 10, 2019
Priority date	May 31, 2019
Publication date	Sep 13, 2022
Grant date	Sep 13, 2022

Abstract

The present application discloses a method and apparatus for calculating the kink current of SOI device, which is used to solve the problem that the kink current calculation in the prior art is not accurate and is not suitable for circuit simulation. The method includes: obtaining the impact ionization factor, the parasitic transistor effect factor, and the drain saturation current of the SOI device respectively; and calculating the kink current of the SOI device according to the impact ionization factor, the parasitic transistor effect factor, and the drain saturation current.

First claim

What is claimed is:

1. A kink current calculation method for SOI device, comprising:
obtaining impact ionization factor, parasitic transistor effect factor, and drain saturation current of the SOI device respectively;
calculating the kink current of the SOI device according to the impact ionization factor, the parasitic transistor effect factor, and the drain saturation current,
wherein obtaining the parasitic transistor effect factor of the SOI device specifically includes: obtaining channel length and carrier diffusion length in body region of the SOI device, and calculating the parasitic transistor effect factor of the SOI device according to the channel length and the carrier diffusion length in the body region.

2. The method according to claim 1 , wherein the parasitic transistor effect factor of the SOI device has a hyperbolic secant dependence on channel length and carrier diffusion length in body region of the SOI device.

3. The method according to claim 1 , wherein the impact ionization factor of the SOI device has an exponential relationship with threshold field F I characterizing the impact ionization, depletion region width l d , drain voltage V D , and interpolation function V Dse related to drain saturation voltage of the SOI device;
alternatively, the impact ionization factor of the SOI device has an exponential relationship with drain voltage V D , voltage parameter V k associated with kink effect, and interpolation function V Dse related to drain saturation voltage of the SOI device.

4. The method according to claim 1 , wherein the calculation method for kink current I kink of the SOI device is:

I
kink

=

C
⁢

(

V
D

-

V

D
⁢
s
⁢
e

)

l
d

⁢

exp
⁡
(

-

F
I

⁢

l
d

V
D

-

V

D
⁢
s
⁢
e

)

⁢

sech
⁡
(

L

L
b

)

⁢

I

D
⁢
s
⁢
a
⁢
t

;

(
1
)

where C is a parameter related to material and geometry of the SOI device, L is channel length of the SOI device, V D is drain voltage of the SOI device, V Dse is interpolation function related to the drain saturation voltage, l d is depletion region width of the SOI device, F I is threshold field for impact ionization of the SOI device, L b is carrier diffusion length in body region of the SOI device, and I Dsat is drain saturation current of the SOI device;
alternatively, the calculation method for kink current I kink of the SOI device is:

I
kink

=

C
k

⁢

(

V
D

-

V

D
⁢
s
⁢
e

)

V
k

⁢

exp
⁡
(

-

V
k

V
D

-

V

Assignees

• Univ Soochow

Inventors

• Wang Mingxiang
• Chen Yanyan
• Zhang Dongli
• Wang Huaisheng

Classifications

• G01R31/2623 Primary

  for measuring break-down voltage therefor · CPC title

• G01R31/2831

  Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates (G01R31/318511 takes precedence; testing during manufacture H10P74/00) · CPC title

• G01R31/2621

  for testing field effect transistors, i.e. FET's · CPC title

• G06F2119/10

  Noise analysis or noise optimisation · CPC title

• G01R31/2884

  using dedicated test connectors, test elements or test circuits on the IC under test (G01R31/2855 takes precedence) · CPC title