Schottky barrier diode and method for manufacturing the same

US11201250B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11201250-B2
Application numberUS-202016848826-A
CountryUS
Kind codeB2
Filing dateApr 14, 2020
Priority dateApr 16, 2019
Publication dateDec 14, 2021
Grant dateDec 14, 2021

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A Schottky barrier diode includes a substrate, a first semiconductor layer formed on the substrate, a second semiconductor layer formed on the first semiconductor layer, and a metal layer formed on the second semiconductor layer to form a Schottky barrier, wherein the first semiconductor layer and the second semiconductor layer are formed of different materials, and a conduction band offset between the first semiconductor layer and the second semiconductor layer is less than a set value.

First claim

Opening claim text (preview).

What is claimed is: 1. A Schottky barrier diode comprising: a substrate; a first semiconductor layer formed on the substrate; a buffer layer formed between the substrate and the first semiconductor layer; a second semiconductor layer formed on the first semiconductor layer; and a Schottky metal layer formed on the second semiconductor layer to form a Schottky barrier, wherein the buffer layer is formed from a same material as the first semiconductor layer, and wherein the first semiconductor layer and the second semiconductor layer are formed of different materials, and a conduction band offset between the first semiconductor layer and the second semiconductor layer is less than a set value. 2. The Schottky barrier diode of claim 1 , wherein the first semiconductor layer is an n + type, and the second semiconductor layer is an n − type. 3. The Schottky barrier diode of claim 1 , wherein the set value is thermal energy at room temperature (300K). 4. The Schottky barrier diode of claim 1 , further comprising an insulating layer formed between the metal layer and the second semiconductor layer. 5. The Schottky barrier diode of claim 4 , further comprising an ohmic metal layer formed on the first semiconductor layer after etching to the second semiconductor layer and the insulating layer at a portion thereof. 6. The Schottky barrier diode of claim 1 , wherein the second semiconductor layer and the first semiconductor layer are partially etched under the Schottky metal layer. 7. A manufacturing method of a Schottky barrier diode, the manufacturing method comprising: doping a first material on a substrate to form a first semiconductor layer; doping a second material different from the first material on the first semiconductor layer to form a second semiconductor layer; forming a Schottky metal layer on the second semiconductor layer such that a Schottky barrier is formed; forming an insulating layer between the second semiconductor layer and the Schottky metal layer; and partially etching the second semiconductor layer and the first semiconductor layer under the Schottky metal layer after forming the Schottky metal layer, wherein a conduction band offset between the first semiconductor layer and the second semiconductor layer is less than a conduction band offset between a first semiconductor layer and a second semiconductor layer of same materials. 8. The manufacturing method of claim 7 , wherein the first semiconductor layer is an n + type, and the second semiconductor layer is an n − type. 9. The manufacturing method of claim 7 , further comprising forming an ohmic metal layer on the first semiconductor layer after etching to the second semiconductor layer and the insulating layer at a portion before forming the Schottky metal layer.

Assignees

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Classifications

  • of Group III-V materials · CPC title

  • to Group III-V semiconductors · CPC title

  • of Schottky diodes · CPC title

  • comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions · CPC title

  • Electrodes comprising a Schottky barrier to a semiconductor · CPC title

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What does patent US11201250B2 cover?
A Schottky barrier diode includes a substrate, a first semiconductor layer formed on the substrate, a second semiconductor layer formed on the first semiconductor layer, and a metal layer formed on the second semiconductor layer to form a Schottky barrier, wherein the first semiconductor layer and the second semiconductor layer are formed of different materials, and a conduction band offset bet…
Who is the assignee on this patent?
Electronics & Telecommunications Res Inst
What technology area does this patent fall under?
Primary CPC classification H10D8/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 14 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).