Schottky barrier diode

Patent metadata

Field	Value
Publication number	US-9595586-B2
Application number	US-201615208469-A
Country	US
Kind code	B2
Filing date	Jul 12, 2016
Priority date	Nov 9, 2011
Publication date	Mar 14, 2017
Grant date	Mar 14, 2017

Abstract

A semiconductor device, includes an n-type semiconductor layer provided with a first semiconductor layer with a low electron carrier concentration and a second semiconductor layer with a high electron carrier concentration, an electrode that is in Schottky-contact with a surface of the first semiconductor layer, and an ohmic electrode formed on a surface of the second semiconductor layer. The n-type semiconductor layer is formed of a Ga 2 O 3 -based single crystal. The first semiconductor layer has an electron carrier concentration Nd based on reverse withstand voltage VRM and electric field-breakdown strength Em of the Ga 2 O 3 -based single crystal.

First claim

What is claimed is:

1. A semiconductor device, comprising:
an n-type semiconductor layer provided with a first semiconductor layer with a low electron carrier concentration and a second semiconductor layer with a high electron carrier concentration;
an electrode that is in Schottky-contact with a surface of the first semiconductor layer; and
an ohmic electrode formed on a surface of the second semiconductor layer,
wherein the n-type semiconductor layer is formed of a Ga 2 O 3 -based single crystal, and
wherein the first semiconductor layer has an electron carrier concentration Nd based on reverse withstand voltage VRM and electric field-breakdown strength Em of the Ga 2 O 3 -based single crystal.

2. The semiconductor device according to claim 1 ,
wherein a thickness of the first semiconductor layer is not less than a width W of a depletion layer derived from the electron carrier concentration Nd and the reverse withstand voltage VRM.

3. The semiconductor device according to claim 1 ,
wherein an electron carrier concentration Nd in the first semiconductor layer is lower than 1×10 17 /cm 3 .

4. The semiconductor device according to claim 1 ,
wherein an electron carrier concentration in the second semiconductor layer is higher than 1×10 18 /cm 3 .

5. The semiconductor device according to claim 3 ,
wherein an electron carrier concentration in the second semiconductor layer is higher than 1×10 18 /cm 3 .

6. The semiconductor device according to claim 2 ,
wherein an electron carrier concentration Nd in the first semiconductor layer is lower than 1×10 17 /cm 3 .

7. The semiconductor device according to claim 2 , wherein an electron carrier concentration in the second semiconductor layer is higher than 1×10 18 /cm 3 .

8. The semiconductor device according to claim 6 ,
wherein an electron carrier concentration in the second semiconductor layer is higher than 1×10 18 /cm 3 .

Assignees

• Tamura Seisakusho Kk

Inventors

• Takizawa Masaru
• Kuramata Akito

Classifications

• H10P14/3442

  N-type · CPC title

• H10P14/3434

  being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

• H10P14/2926

  Crystal orientations · CPC title

• H10P14/2918 Primary

  being semiconductor metal oxides (Group IIB-VIA materials H10P14/2913) · CPC title

• H10P14/22

  using physical deposition, e.g. vacuum deposition or sputtering · CPC title