Integrated circuit (IC) device package lid attach utilizing nano particle metallic paste

US11164804B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11164804-B2
Application numberUS-201916519277-A
CountryUS
Kind codeB2
Filing dateJul 23, 2019
Priority dateJul 23, 2019
Publication dateNov 2, 2021
Grant dateNov 2, 2021

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An IC device package includes a carrier, one or more IC devices and a lid. The lid includes a lid-ridge. The lid is connected to the carrier by connecting the lid-ridge to the carrier with first nano particle metallic paste, prior to connecting the IC device to the carrier. Subsequent to connecting the IC device to the carrier, the lid is connected to the lid-ridge with second nano particle metallic paste. The nano particle metallic paste may be sintered to form a metallic connection. In multi-IC device packages, the lid-ridge may be positioned between the lid and the carrier and between the IC devices.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of fabricating an integrated circuit (IC) device carrier package comprising: aligning a lid-ridge with an IC device carrier, the lid-ridge consisting of a metal bar, a plurality of upper contacts formed upon an upper surface of the metal bar, and a plurality of lower contacts formed upon a lower surface of the metal bar; connecting a lower contact of the lid-ridge to a pad of an IC device carrier with a first nano particle metallic paste, wherein the lower contact of the lid-ridge is one of the plurality of lower contacts formed upon the lower surface of the metal bar; sintering the first nano particle metallic paste to form a first metallic connection between the lower contact and the first pad; subsequent to sintering the first nano particle metallic paste, attaching an IC device to the IC device carrier with solder interconnects; forming a contiguous underfill material instance between the IC device and the IC device carrier and between the metal bar of the lid-ridge and the IC device carrier; applying a thermal interface material to the IC device upper surface; applying a second nano particle metallic paste to the underside of a lid; attaching the lid to the lid-ridge by connecting an upper contact of the lid-ridge to the underside of the lid with the second nano particle metallic paste, wherein the upper contact of the lid-ridge is one of the plurality of upper contacts formed upon the upper surface of the metal bar; and curing the thermal interface material and sintering the second nano particle metallic paste to form a second metallic connection between the upper contact and the lid. 2. The method of claim 1 , further comprising: applying a seal band material to the IC device carrier around the perimeter of the IC device and the lid-ridge. 3. The method of claim 2 , further comprising: attaching the lid to the IC device carrier with the seal band material. 4. The method of claim 2 , further comprising: attaching the lid to the IC device with the thermal interface material. 5. The method of claim 1 , wherein the pad of the IC device carrier provides a ground potential. 6. The method of claim 5 , wherein the pad of the IC device carrier grounds the lid-ridge and grounds the lid.

Assignees

Inventors

Classifications

  • Package configurations · CPC title

  • Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

  • having interconnections parallel to the insulating or insulated base · CPC title

  • Containers comprising an insulating or insulated base · CPC title

  • the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11164804B2 cover?
An IC device package includes a carrier, one or more IC devices and a lid. The lid includes a lid-ridge. The lid is connected to the carrier by connecting the lid-ridge to the carrier with first nano particle metallic paste, prior to connecting the IC device to the carrier. Subsequent to connecting the IC device to the carrier, the lid is connected to the lid-ridge with second nano particle met…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10W76/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 02 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).