Amplifier circuitry for carrier aggregation

Patent metadata

Field	Value
Publication number	US-11095334-B1
Application number	US-202017028598-A
Country	US
Kind code	B1
Filing date	Sep 22, 2020
Priority date	Sep 22, 2020
Publication date	Aug 17, 2021
Grant date	Aug 17, 2021

Abstract

An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The amplifier circuitry is operable in a non-carrier-aggregation mode and a carrier aggregation mode. The amplifier circuitry may include an input transformer that is coupled to multiple amplifier stages such as a common gate amplifier stage, a cascode amplifier stage, and a common source amplifier stage. The common gate amplifier stage may include switches for selectively activating a set of cross-coupled capacitors to help maintain input impedance matching in the non-carrier-aggregation mode and the carrier-aggregation mode. The common source amplifier stage may include additional switches for activating and deactivating the common source amplifier stage to help maintain the gain in the non-carrier-aggregation mode and the carrier-aggregation mode.

First claim

What is claimed is:

1. Amplifier circuitry operable in a carrier-aggregation mode and a non-carrier-aggregation mode, the amplifier circuitry comprising:
an input port configured to receive radio-frequency signals from an antenna;
transformer circuitry coupled to the input port;
a first amplifier coupled to the transformer circuitry; and
a second amplifier coupled to the transformer circuitry, the first amplifier and the second amplifier each including
a common gate amplifier stage having an input coupled to the transformer circuitry and having an output,
a common source amplifier stage coupled to the output of the common gate amplifier stage, the common source amplifier stage coupled to a common source bias voltage that is configured to activate and deactivate the common source amplifier stage in the carrier-aggregation mode and the non-carrier-aggregation mode, and
an output port coupled to the output of the common gate amplifier stage.

2. The amplifier circuitry of claim 1 , wherein the transformer circuitry comprises:
a primary coil having a first terminal coupled to the input port and a second terminal coupled to a ground line;
a first adjustable capacitor coupled in series between the input port and the first terminal; and
a second adjustable capacitor having a first terminal coupled to the input port and a second terminal coupled to the ground line.

3. The amplifier circuitry of claim 2 , wherein the transformer circuitry comprises:
a first secondary coil coupled to the input of the common gate amplifier stage in the first amplifier;
a third adjustable capacitor coupled in parallel with the first secondary coil, the third adjustable capacitor being configured to control an input impedance of the first amplifier in the non-carrier-aggregation mode and the carrier-aggregation mode;
a second secondary coil coupled to the input of the common gate amplifier stage in the second amplifier; and
a fourth adjustable capacitor coupled in parallel with the second secondary coil, the fourth adjustable capacitor being configured to control an input impedance of the second amplifier in the non-carrier-aggregation mode and the carrier-aggregation mode.

4. The amplifier circuitry of claim 1 , wherein the common gate amplifier stage in each of the first amplifier and the second amplifier comprises:
a first transistor having a source terminal coupled to the input of the common gate amplifier stage, a drain terminal coupled to the output of the common gate amplifier stage, and a gate terminal;
a second transistor having a source terminal coupled to the input of the common gate amplifier stage, a drain terminal coupled to the output of the common gate amplifier stage, and a gate terminal;
a first capacitor having a first terminal coupled to the gate terminal of the first transistor and having a second terminal coupled to the source terminal of the second transistor; and
a second capacitor having a first terminal coupled to the gate terminal of the second transistor and having a second terminal coupled to the source terminal of the first transistor.

5. The amplifier circuitry of claim 1 , wherein each of the first amplifier and the second amplifier comprises a cascode amplifier stage having:
an input coupled to the output of the common gate amplifier stage;
an output coupled to the output port;
a first transistor having a source terminal coupled to the input of the cascode amplifier stage, a drain terminal coupled to the output of the cascode amplifier stage, and a gate terminal coupled to a cascode bias line; and
a second transistor having a source terminal coupled to the input of the cascode amplifier stage, a drain terminal coupled to the output of the cascode amplifier stage, and a gate terminal coupled to the cascode bias line.

6. The amplifier circuitry of claim 5 , wherein the common source amplifier stage in each of the first amplifier and the second amplifier comprises:
a third transistor having a source terminal coupled to a ground line, a gate terminal coupled to the source terminal of the first transistor, and a drain terminal coupled to the drain terminal of the second transistor; and
a fourth transistor having a source terminal coupled to a ground line, a gate terminal coupled to the source terminal of the second transistor, and a drain terminal coupled to the drain terminal of the first transistor.

7. The amplifier circuitry of claim 1 , wherein the first amplifier and the second amplifier each comprises:
an output coil having a first terminal coupled to the output port, a second terminal coupled to the output port, and a center tap coupled to a positive power supply line.

8. The amplifier circuitry of claim 7 , wherein the first amplifier and the second amplifier each comprises:
an adjustable output capacitor having a first terminal coupled to the first terminal of the output coil and a second terminal coupled to the second terminal of the output coil.

9. The amplifier circuitry of claim 1 , wherein the transformer circuitry comprises:
a primary coil having a first terminal coupled to the input port and a second terminal coupled to a ground line; and
a secondary coil having a first terminal coupled to the first amplifier and the second amplifier and a second terminal coupled to the first amplifier and the second amplifier.

10. The amplifier circuitry of claim 9 , wherein the common gate amplifier stage in each of the first amplifier and the second amplifier comprises:
a first transistor having a source terminal coupled to the input of the common gate amplifier stage, a drain terminal coupled to the output of the common gate amplifier stage, and a gate terminal;
a second transistor having a source terminal coupled to the input of the common gate amplifier stage, a drain terminal coupled to the output of the common gate amplifier stage, and a gate terminal;
a first capacitor having a first terminal coupled to the gate terminal of the first transistor and a second terminal coupled to the source terminal of the second transistor; and
a second capacitor having a first terminal coupled to the gate terminal of the second transistor and a second terminal coupled to the source terminal of the first transistor.

11. The amplifier circuitry of claim 10 , wherein the common gate amplifier stage in each of the first amplifier and the second amplifier comprises:
a first set of switches configured to activate and deactivate the first and second capacitors in the non-carrier-aggregation mode and the carrier-aggregation mode; and
a second set of switches configured to couple the gate terminal of the first transistor and the gate terminal of the second transistor to a common gate bias line.

12. The amplifier circuitry of claim 9 , wherein the amplifier circuitry includes only one common gate amplifier stage that is shared between the first amplifier and the second amplifier, the shared common gate amplifier stage comprising:
a first transistor having a source terminal coupled to the first terminal of the secondary coil, a drain terminal coupled to the first amplifier and the second amplifier, and a gate terminal;
a second transistor having a source terminal coupled to the second terminal of the secondary coil, a drain terminal coupled to the first amplifier and the second amplifier, and a gate terminal;
a first capacitor having a first terminal coupled to the gate terminal of the first transistor and a second terminal coupled to the source terminal of the second transistor;
a second capacitor having a first terminal coupled to the gate terminal of the second transistor and a second terminal coupled to the source terminal of the first transi

Assignees

• Apple Inc

Inventors

• Mohammadnezhad Seyed Mohammad Hossein
• Yao Xi
• Ismail Aly

Classifications

• H03F2200/541

  Transformer coupled at the output of an amplifier · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F3/45179

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

• H03F1/523

  for amplifiers using field-effect devices (H03F1/526 takes precedence) · CPC title

• H03F3/211 Primary

  using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title