Dual stage carrier-aggregation (CA) low noise amplifier (LNA) having harmonic rejection and high linearity

US9374043B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9374043-B2
Application numberUS-201414292216-A
CountryUS
Kind codeB2
Filing dateMay 30, 2014
Priority dateMay 30, 2014
Publication dateJun 21, 2016
Grant dateJun 21, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A device includes a load circuit configured to receive an amplified communication signal, the load circuit having a center tapped inductor structure configured to divide the amplified communication signal into a first portion and a second portion, the load circuit configured to resonate at a harmonic of the amplified communication signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A device, comprising: a load circuit configured to receive an amplified communication signal, the load circuit having a center tapped inductor structure configured to divide the amplified communication signal into a first portion and a second portion, the load circuit configured to resonate at a harmonic of the amplified communication signal; and a two-stage low noise amplifier (LNA) comprising a first LNA stage and a second LNA stage, the first LNA stage configured to generate the amplified communication signal to the load circuit, the load circuit configured to apply the first portion of the amplified communication signal to at least two amplifiers in the second LNA stage. 2. The device of claim 1 , wherein the load circuit comprises a first inductor and a second inductor, a first adjustable capacitor and a second adjustable capacitor. 3. The device of claim 2 , wherein the second inductor and the second adjustable capacitor are configured to create a notch filter response at the harmonic of the amplified communication signal. 4. The device of claim 2 , wherein the first adjustable capacitor is configured to resonate with the first inductor and the second inductor at a desired receive frequency. 5. A device, comprising: a load circuit comprising a first inductor, a second inductor, a first adjustable capacitor, and a second adjustable capacitor, the load circuit configured to receive an amplified communication signal, the load circuit having a center tapped inductor structure configured to divide the amplified communication signal into a first portion and a second portion, wherein the first adjustable capacitor is configured to resonate with the first inductor and the second inductor to develop a feedback signal, the feedback signal comprising the second portion of the amplified communication signal. 6. The device of claim 2 , wherein the second inductor is configured to resonate with the second adjustable capacitor at a frequency corresponding to a third harmonic of the amplified communication signal. 7. The device of claim 6 , wherein the second inductor configured to resonate with the second adjustable capacitor at a frequency corresponding to a third harmonic of the amplified communication signal is configured to cancel a third harmonic of the amplified communication signal. 8. A method, comprising: amplifying a communication signal in a first stage of a two stage low noise amplifier (LNA); dividing at a center tapped inductor structure of a load circuit the amplified communication signal into a first portion and a second portion; providing the first portion to a plurality of amplification paths in a second stage of the two-stage LNA; and resonating at a harmonic frequency of the amplified communication signal. 9. The method of claim 8 , wherein the resonating creates a notch filter response at the harmonic of the amplified communication signal. 10. The method of claim 8 , further comprising resonating at a frequency corresponding to a third harmonic of the amplified communication signal. 11. The method of claim 10 , wherein resonating at a frequency corresponding to a third harmonic of the amplified communication signal cancels a third harmonic of the amplified communication signal. 12. A device, comprising: means for amplifying a communication signal in a first stage of a two stage low noise amplifier (LNA); means for dividing the amplified communication signal into a first portion and a second portion and for applying the first portion to a plurality of amplification paths in a second stage of the two-stage LNA; and means for resonating at a harmonic frequency of the amplified communication signal; and means for creating a notch filter response at the harmonic of the amplified communication signal. 13. The device of claim 12 , further comprising means for resonating at a frequency corresponding to a third harmonic of the amplified communication signal. 14. The device of claim 13 , further comprising means for canceling a third harmonic of the amplified communication signal. 15. The device of claim 12 , wherein the means for dividing comprises a load circuit. 16. The device of claim 15 , wherein the load circuit comprises a center tapped inductor structure.

Assignees

Inventors

Classifications

  • the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not · CPC title

  • the amplifier being a low noise amplifier [LNA] · CPC title

  • Circuits · CPC title

  • H03F1/26Primary

    Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title

  • A filter circuit coupled to the output of an amplifier · CPC title

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Frequently asked questions

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What does patent US9374043B2 cover?
A device includes a load circuit configured to receive an amplified communication signal, the load circuit having a center tapped inductor structure configured to divide the amplified communication signal into a first portion and a second portion, the load circuit configured to resonate at a harmonic of the amplified communication signal.
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/26. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 21 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).