Spurious signal mitigation for carrier aggregation amplifier

US9425746B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9425746-B2
Application numberUS-201414228288-A
CountryUS
Kind codeB2
Filing dateMar 28, 2014
Priority dateMar 28, 2014
Publication dateAug 23, 2016
Grant dateAug 23, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A device includes an amplifier circuit comprising a plurality of amplification paths, and at least one switchable bypass capacitance coupled to an associated shared power distribution network, the at least one switchable bypass capacitance and at least one of the plurality of amplification paths responsive to a control signal configured to selectively ground the at least one switchable bypass capacitance and selectively enable the at least one of the amplification paths based on a selected operating mode.

First claim

Opening claim text (preview).

What is claimed is: 1. A device, comprising: an amplifier circuit comprising a first amplification path and a second amplification path; a switchable bypass capacitance coupled to an associated shared power distribution network, the switchable bypass capacitance and the first and second amplification paths responsive to a control signal configured to selectively ground the switchable bypass capacitance and selectively enable one of the first and second amplification paths while selectively disabling the other of the first and second amplification paths based on a selected operating mode, wherein the switchable bypass capacitance corresponds to the disabled one of the first and second amplification paths. 2. The device of claim 1 , wherein the amplifier circuit comprises a low noise amplifier. 3. The device of claim 1 , wherein the control signal comprises an override signal configured to selectively ground the switchable bypass capacitance corresponding to the disabled one of the first and second amplification paths. 4. The device of claim 3 , wherein selectively grounding the switchable bypass capacitance corresponding to the disabled amplification path mitigates spurious signals through the disabled one of the first and second amplification paths. 5. The device of claim 1 , further comprising combinational logic configured to generate the control signal to control a selected one of a plurality of amplifiers associated with each of the first and second amplification paths and the switchable bypass capacitance associated with the selected one of the plurality of amplifiers. 6. The device of claim 1 , wherein each of the first and second amplification paths comprises an amplifier, and the control signal comprises an override signal configured to ground the switchable bypass capacitance associated with the amplifier of the disabled one of the first and second amplification paths. 7. The device of claim 6 , wherein the at least one switchable bypass capacitance associated with the amplifier of the disabled one of the first and second amplification paths being grounded mitigates spurious signals through the amplifier of the disabled one of the first and second amplification paths. 8. The device of claim 1 , wherein each of the first and second amplification paths comprises an amplifier and at least one switchable bypass capacitance, and wherein the control signal is configured to ground the at least one switchable bypass capacitance associated with the amplifier of the disabled one of the first and second amplification paths or the amplifier of an enabled one of the first and second amplification paths. 9. A method comprising: selectively grounding a switchable bypass capacitance associated with a shared power distribution network based on a selected operating mode; and selectively enabling one of first and a second amplification paths of an amplifier circuit while disabling the other of the first and second amplification paths, the amplifier circuit associated with the shared power distribution network, the enabled one of the first and second amplification paths generating an output signal based on the selected operating mode, the selectively grounded switchable bypass capacitance corresponding to the disabled one of the first and second amplification paths. 10. The method of claim 9 , wherein selectively grounding the switchable bypass capacitance based on the selected operating mode prevents a spurious signal from interfering with a desired signal in the enabled one of the first and second amplification paths. 11. The method of claim 9 , further comprising selectively grounding the switchable bypass capacitance corresponding to the disabled one of the first and second amplification paths in response to an override signal. 12. The method of claim 11 , wherein selectively grounding the switchable bypass capacitance corresponding to the disabled one of the first and second amplification paths in response to an override signal mitigates spurious signals through the disabled one of the first and second amplification paths. 13. The method of claim 9 , further comprising controlling a selected one of a plurality of amplifiers associated with each amplification path and the switchable bypass capacitance associated with the selected one of the plurality of amplifiers using a single control signal. 14. The method of claim 9 , further comprising selectively grounding at least one switchable bypass capacitance associated with the enabled one of the first and second amplification paths. 15. A device, comprising: means for selectively grounding a switchable bypass capacitance associated with a shared power distribution network based on a selected operating mode; and means for selectively enabling one of first and second amplification paths of an amplifier circuit while disabling the other of the first and second amplification paths, the amplifier circuit associated with the shared power distribution network, the enabled one of the first and second amplification paths generating an output signal based on the selected operating mode, the selectively grounded switchable bypass capacitance corresponding to the disabled one of the first and second amplification paths. 16. The device of claim 15 , further comprising means for preventing a spurious signal from interfering with a desired signal in the enabled one of the first and second amplification paths. 17. The device of claim 15 , wherein one of the first and second amplification paths is disabled when the bypass capacitance corresponding to the disabled one of the first and second amplification paths is grounded. 18. The device of claim 17 , further comprising means for mitigating spurious signals through the disabled one of the first and second amplification paths. 19. The device of claim 15 , further comprising means for controlling a selected one of a plurality of amplifiers associated with each of the first and second amplification paths and the switchable bypass capacitance associated with the selected one of the plurality of amplifiers using a single control signal. 20. The device of claim 15 , further comprising means for selectively grounding a second switchable bypass capacitance associated with the enabled one of the first and second amplification paths.

Assignees

Inventors

Classifications

  • Selecting one or more amplifiers from a plurality of amplifiers · CPC title

  • Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal · CPC title

  • using switched capacitors, e.g. dynamic amplifiers; using switched capacitors as resistors in differential amplifiers (H03F3/45 takes precedence) · CPC title

  • the amplifier being a low noise amplifier [LNA] · CPC title

  • in integrated circuits · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9425746B2 cover?
A device includes an amplifier circuit comprising a plurality of amplification paths, and at least one switchable bypass capacitance coupled to an associated shared power distribution network, the at least one switchable bypass capacitance and at least one of the plurality of amplification paths responsive to a control signal configured to selectively ground the at least one switchable bypass c…
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/086. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 23 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).