Contact structure and semiconductor device and method of forming the same

US10867851B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10867851-B2
Application numberUS-201815905765-A
CountryUS
Kind codeB2
Filing dateFeb 26, 2018
Priority dateFeb 26, 2018
Publication dateDec 15, 2020
Grant dateDec 15, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A contact structure and semiconductor device and method of forming the same are disclosed. The contact structure includes a first metal layer and a second metal layer. The first metal layer is disposed in a first dielectric layer. The second metal layer is disposed in a second dielectric layer and extended into the first dielectric layer to electrically connect the first metal layer, wherein the first metal layer and the second metal layer include different metals.

First claim

Opening claim text (preview).

What is claimed is: 1. A contact structure, comprising: a first metal layer, disposed in a first dielectric layer; and a second metal layer, partly penetrating into a second dielectric layer without penetrating the entire second dielectric layer and extended into the first dielectric layer to electrically connect the first metal layer, wherein the first metal layer and the second metal layer comprise different metals. 2. The contact structure of claim 1 , wherein an interface of the first metal layer and the second metal layer has a dish-like depression. 3. The contact structure of claim 1 , wherein the first metal layer is in contact with the second metal layer. 4. The contact structure of claim 1 , wherein resistance of the first metal layer is different from resistance of the second metal layer. 5. The contact structure of claim 1 , wherein the metals of the first metal layer and the second metal layer are respectively selected from a group consisting of tungsten, copper and cobalt. 6. The contact structure of claim 1 further comprising a barrier layer disposed between the first metal layer and the second metal layer and surrounding an entire sidewall of the second metal layer. 7. A semiconductor device, comprising: a first conductive element; a second conductive element; and a contact structure disposed between and electrically connecting the first and second conductive elements, the contact structure comprising: a first conductive structure in a first dielectric layer; and a second conductive structure not integrally formed with the first conductive structure, partially in the first dielectric layer and partially in a second dielectric layer on the first dielectric layer, wherein an entire sidewall of the second conductive structure is substantially aligned with and in contact with an entire sidewall of the first conductive structure. 8. The semiconductor device of claim 7 , wherein metals of the first and second conductive structures are respectively selected from a group consisting of tungsten, copper and cobalt. 9. The semiconductor device of claim 7 , wherein the first conductive element comprises a gate structure or a source/drain region. 10. The semiconductor device of claim 7 further comprising a third conductive structure in a third dielectric layer over the first dielectric layer and the second dielectric layer, wherein the third conductive structure is further extended into the second dielectric layer to electrically connect the second conductive structure. 11. The semiconductor device of claim 7 , wherein the second conductive structure comprises a metal layer and a barrier layer disposed between the metal layer and the first conductive structure and surrounding the entire sidewall of the metal layer. 12. A contact structure, comprising: a first conductive structure disposed in a first dielectric layer; and a second conductive structure not integrally formed with the first conductive structure, partly penetrating into a second dielectric layer without penetrating the entire second dielectric layer and extended into the first dielectric layer, wherein the first conductive structure comprises a first metal and the second conductive structure comprises a second metal, and the first metal is in contact with the second metal. 13. The contact structure of claim 12 , wherein an interface between the first and second conductive structures is flat. 14. The contact structure of claim 12 , wherein an interface between the first and second conductive structures has a dish-like depression. 15. The contact structure of claim 12 , wherein a diameter of the second conductive structure is substantially constant and substantially equal to a diameter of the first conductive structure. 16. The contact structure of claim 1 , wherein an entire sidewall of the second metal layer is substantially aligned with an entire sidewall of the first metal layer. 17. The contact structure of claim 1 , wherein a diameter of the second metal layer is substantially constant and substantially equal to a diameter of the first metal layer. 18. The contact structure of claim 7 , wherein the entire sidewall of the second conductive structure is substantially vertically aligned with the entire sidewall of the first conductive structure. 19. The contact structure of claim 10 , wherein a top surface of the third conductive structure is substantially flush with a top surface of the third dielectric layer. 20. The contact structure of claim 12 , wherein the second conductive structure is not extended onto a top surface of the first dielectric layer.

Assignees

Inventors

Classifications

  • Interconnections with multiple fill metals, e.g. having different metals in wide and narrow interconnections, or having different metals in vias and in trenches · CPC title

  • based on metals, e.g. alloys, metal silicides (H10W20/4484 takes precedence) · CPC title

  • Barrier, adhesion or liner layers · CPC title

  • by smoothing of conductive parts, e.g. by planarisation · CPC title

  • the barrier, adhesion or liner layers being within a main fill metal · CPC title

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What does patent US10867851B2 cover?
A contact structure and semiconductor device and method of forming the same are disclosed. The contact structure includes a first metal layer and a second metal layer. The first metal layer is disposed in a first dielectric layer. The second metal layer is disposed in a second dielectric layer and extended into the first dielectric layer to electrically connect the first metal layer, wherein th…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W20/4403. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 15 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).