Semiconductor device

US10840258B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10840258-B2
Application numberUS-201816109381-A
CountryUS
Kind codeB2
Filing dateAug 22, 2018
Priority dateMar 13, 2018
Publication dateNov 17, 2020
Grant dateNov 17, 2020

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A semiconductor device includes a base, a stacked body, a plate-shaped portion, and first to third columnar portions. The stacked body is provided over the base. The plate-shaped portion is inside the stacked body from an upper end of the stacked body to the base. The first to third columnar portions are inside the stacked body from the upper end of the stacked body to the base. The second columnar portion is located away from the first columnar portion in a first direction. The third columnar portion is aligned with the first columnar portion and the second columnar portion in the first direction. A pitch between the third columnar portion and the first columnar portion is a first pitch. A pitch between the third columnar portion and the second columnar portion is a second pitch larger than the first pitch.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a base body comprising a semiconductor region; a stacked body comprising a plurality of alternating conductive layers and insulating layers located one over the other in a first direction over the semiconductor region of the base body; a plate-shaped portion comprising a first insulating material and extending through the stacked body in the first direction from an upper end of the stacked body to the base body and in contact with the semiconductor region, the plate-shaped portion also extending in a second direction crossing the first direction; a first columnar portion comprising a first semiconductor portion and a first memory film extending through the stacked body in the first direction from the upper end of the stacked body to the base body, the first semiconductor portion contacting the semiconductor region of the base body, the first memory film being located between the first semiconductor portion layer and at least one of the conductive layers in the stacked body; a second columnar portion comprising a second semiconductor portion and a second memory film extending through the stacked body in the first direction from the upper end of the stacked body to the base body, the second semiconductor portion contacting the semiconductor region of the base body, the second memory film being located between the second semiconductor portion and at least one of the conductive layers in the stacked body, and the second columnar portion being spaced from the first columnar portion in the second direction; and a third columnar portion comprising a third semiconductor portion and a third memory film extending through the stacked body in the first direction from the upper end of the stacked body to the base body and in contact with the semiconductor region, the third semiconductor portion contacting the semiconductor region of the base body, the third memory film being located between the third semiconductor portion and at least one of the conductive layers in the stacked body, the third columnar portion being located between the first columnar portion and the second columnar portion in the second direction, wherein a first separation distance in the second direction between the first columnar portion and the third columnar portion is different from a second separation distance in the second direction between the second columnar portion and the third columnar portion. 2. The semiconductor device according to claim 1 , wherein the first separation distance is less than the second separation distance. 3. The semiconductor device according to claim 2 , further comprising: a fourth columnar portion comprising a fourth semiconductor portion and a fourth memory film extending through the stacked body in the first direction from the upper end of the stacked body to the base body, the fourth semiconductor portion contacting the semiconductor region of the base body, the fourth memory film being located between the fourth semiconductor portion and at least one of the conductive layers in the stacked body, the second columnar portion being located between the third columnar portion and the fourth columnar portion in the second direction; and a fifth columnar portion comprising a fifth semiconductor portion and a fifth memory film extending through the stacked body in the first direction from the upper end of the stacked body to the base body, the fifth semiconductor portion contacting the semiconductor region of the base body, the fifth memory film being located between the fifth semiconductor portion and at least one of the conductive layers in the stacked body, the fourth columnar portion being located between the second columnar portion and the fifth columnar portion in the second direction, wherein a third separation distance in the second direction between the second columnar portion and the fourth columnar portion is equal to the first separation distance, and a fourth separation distance in the second direction between the fourth columnar portion and the fifth columnar portion is equal to the second separation distance. 4. The semiconductor device according to claim 3 , further comprising: a sixth columnar portion comprising a sixth semiconductor portion and a sixth memory film extending through the stacked body in the first direction from the upper end of the stacked body to the base body, the sixth semiconductor portion contacting the semiconductor region of the base body, the sixth memory film being located between the sixth semiconductor portion and at least one of the conductive layers in the stacked body, the sixth columnar portion being spaced from the first columnar portion and the third columnar portion and located between the first columnar portion and the third columnar portion in the second direction; and a seventh columnar portion comprising a seventh semiconductor portion and a seventh memory film extending through the stacked body in the first direction from the upper end of the stacked body to the base body, the seventh semiconductor portion contacting the semiconductor region of the base body, the seventh memory film being located between the seventh semiconductor portion and at least one of the conductive layers in the stacked body, the seventh columnar portion being aligned with the sixth columnar portion in the second direction, spaced from the third columnar portion and the second columnar portion, and located between the third columnar portion and the second columnar portion in the second direction, wherein a fifth separation distance in the second direction between the sixth columnar portion and the seventh columnar portion is equal to the second separation distance. 5. The semiconductor device according to claim 4 , wherein a separation distance between the sixth columnar portion and the first columnar portion is equal to a separation distance between the sixth columnar portion and the third columnar portion. 6. The semiconductor device according to claim 4 , wherein a separation distance between the sixth columnar portion and the first columnar portion is less than a separation distance between the sixth columnar portion and the third columnar portion. 7. The semiconductor device according to claim 2 , further comprising: a fourth columnar portion comprising a fourth semiconductor portion and a fourth memory film extending through the stacked body in the first direction from the upper end of the stacked body to the base body, the fourth semiconductor portion contacting the semiconductor region of the base body, the fourth memory film being located between the fourth semiconductor portion and at least one of the conductive layers in the stacked body, the second columnar portion being located between the third columnar portion and the fourth columnar portion in the second direction; and a fifth columnar portion comprising a fifth semiconductor portion and a fifth memory film extending through the stacked body in the first direction from the upper end of the stacked body to the base body, the fifth semiconductor portion contacting the semiconductor region of the base body, the fifth memory film being located between the fifth semiconductor portion and at least one of the conductive layers in the stacked body, the fourth columnar portion being located between the second columnar portion and the fifth columnar portion in the second direction, wherein a third separation distance in the second direction between the second columnar portion and the fourth columnar portion is equal to the first separation distance, and a fourth separation distance in the second direction between the fourth columnar portion and the fifth columnar portion is equal to the first separation distance. 8. The semi

Assignees

Inventors

Classifications

  • Vertical IGFETs (H10D30/66 {, H10D30/6728, H10D30/689, H10D30/693} take precedence) · CPC title

  • H10D64/037Primary

    comprising charge-trapping insulators · CPC title

  • H10B43/27Primary

    the channels comprising vertical portions, e.g. U-shaped channels · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

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Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10840258B2 cover?
A semiconductor device includes a base, a stacked body, a plate-shaped portion, and first to third columnar portions. The stacked body is provided over the base. The plate-shaped portion is inside the stacked body from an upper end of the stacked body to the base. The first to third columnar portions are inside the stacked body from the upper end of the stacked body to the base. The second colu…
Who is the assignee on this patent?
Toshiba Memory Corp
What technology area does this patent fall under?
Primary CPC classification H10D64/037. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 17 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).