Semiconductor memory device

Patent metadata

Field	Value
Publication number	US-9741736-B2
Application number	US-201615069432-A
Country	US
Kind code	B2
Filing date	Mar 14, 2016
Priority date	May 20, 2011
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a plurality of columnar portions, and a first interconnect. When an imaginary first straight line extending in a second direction crossing a first direction is set, the plurality of columnar portions are divided into first sets of n (n is an integer number not less than 3 and not more than 32) columnar portions with center axes alternately disposed on both sides of the first straight line along the second direction and second sets of n columnar portions having position relationships of inversion of the first sets with respect to the first straight line, and the first sets and the second sets are alternately arranged.

First claim

What is claimed is:

1. A semiconductor memory device comprising:
a substrate;
a stacked body provided on the substrate and including a plurality of electrode layers respectively separately stacked in a stacking direction;
a plurality of columnar portions provided within the stacked body and extending in the stacking direction; and
a first interconnect provided on the plurality of columnar portions and extending in a first direction, the first direction being parallel to a surface of the substrate and perpendicular to the stacking direction, wherein
when an imaginary first straight line extending in a second direction is set, the second direction being parallel to the surface of the substrate and perpendicular to the stacking direction, the second direction crossing both the first direction and a third direction, the third direction being parallel to the surface of the substrate and perpendicular to both the stacking direction and the first direction, the plurality of columnar portions being divided into:
first sets of n (n is an integer number not less than 3 and not more than 32) columnar portions disposed adjacently along the imaginary first straight line having center axes alternately disposed on both sides of the imaginary first straight line along the second direction, and
second sets of n columnar portions disposed adjacently along an imaginary second straight line parallel to the imaginary first straight line having center axes alternately disposed on both sides of the imaginary second straight line along the second direction, the second sets having position relationships of inversion with respect to the first sets, and

the first sets and the second sets being alternately arranged with respect to one another.

2. The device according to claim 1 , wherein
the plurality of columnar portions have a first columnar portion, a second columnar portion, and a third columnar portion disposed in a triangle pattern, and a fourth columnar portion, a fifth columnar portion, and a sixth columnar portion disposed in a triangle pattern,
a first triangle formed by imaginary straight lines connecting a center of the first columnar portion, a center of the second columnar portion, and a center of the third columnar portion is an inversion with respect to a second triangle formed by imaginary straight lines connecting a center of the fourth columnar portion, a center of the fifth columnar portion, and a center of the sixth columnar portion, and
when an imaginary third straight line connecting the centers of the first columnar portion and the fourth columnar portion is set, an imaginary fourth straight line connecting the centers the second columnar portion and the third columnar portion is set, and an imaginary fifth straight line connecting the centers of the fifth columnar portion and the sixth columnar portion is set:
the imaginary fourth straight line and the imaginary fifth straight line are parallel with each other and extend in the third direction crossing the first direction and the second direction, and
the imaginary third straight line does not extend in the third direction.

3. The device according to claim 2 , wherein
a distance between the first columnar portion and the fourth columnar portion is longer than a distance between the first columnar portion and the fifth columnar portion and a distance between the second columnar portion and the fourth columnar portion, and
the distance between the first columnar portion and the fourth columnar portion is shorter than a distance between the third columnar portion and the sixth columnar portion.

4. The device according to claim 3 , wherein the first columnar portion and the fifth columnar portion, the second columnar portion and the fourth columnar portion, and the third columnar portion and the sixth columnar portion are respectively disposed along a fourth direction.

5. The device according to claim 4 , wherein a first angle formed by the third direction and the fourth direction is not less than 30 degrees and not more than 60 degrees.

6. The device according to claim 1 , wherein
the plurality of columnar portions are disposed in a first region and a second region provided adjacent to the first region in the third direction crossing both the first direction and the second direction,
the first interconnects in the same numbers extend into the first region and the second region, and
the columnar portions within the first region are disposed in a different disposition of the columnar portions than those within the second region.

7. The device according to claim 6 , wherein the columnar portions within the first region are disposed to be an inversion of the disposition of the columnar portions within the second region.

8. The device according to claim 6 , wherein the plurality of columnar portions are disposed by alternate repetition of the disposition of the columnar portions within the first region and the disposition of the columnar portions within the second region.

9. A semiconductor memory device comprising:
a substrate;
a stacked body provided on the substrate and including a plurality of electrode layers respectively separately stacked;
a plurality of columnar portions provided within the stacked body and extending in a stacking direction of the stacked body; and
an interconnect portion provided within the stacked body and extending in a first direction, wherein
at least part of the plurality of columnar portions are disposed in a first pattern in which a plurality of equilateral triangles are combined in a staggered manner in the first direction,
a first pair of columnar portions of two equilateral triangles disposed in the first pattern have centers of the columnar portions connected by an imaginary first straight line not extending in the first direction,
a second pair of columnar portions of the two equilateral triangles disposed in the first pattern have centers of the columnar portions connected by an imaginary second straight line extending in the first direction,
a third pair of columnar portions of the two equilateral triangles disposed in the first pattern have centers of the columnar portions connected by an imaginary third straight line extending in the first direction,
the plurality of columnar portions have a first columnar portion, a second columnar portion, and a third columnar portion, a fourth columnar portion, a fifth columnar portion, and a sixth columnar portion disposed in the first pattern,
a first triangle formed by imaginary straight lines connecting a center of the first columnar portion, a center of the second columnar portion, and a center of the third columnar portion is an inversion with respect to a second triangle formed by imaginary straight lines connecting a center of the fourth columnar portion, a center of the fifth columnar portion, and a center of the sixth columnar portion,
one of the first columnar portion, the second columnar portion, and the third columnar portion and one of the fourth columnar portion, the fifth columnar portion, and the sixth columnar portion are connected by the imaginary first straight line,
a distance between the first columnar portion and the fourth columnar portion is longer than a distance between the first columnar portion and the fifth columnar portion and a distance between the second columnar portion and the fourth columnar portion, and
the distance between the first columnar portion and the fourth columnar portion is shorter than a distance between the third columnar portion and the sixth columnar portion.

10. The device according to claim 9 , wherein the first columnar portion and the fifth columnar portion, the second columnar portion and the fourth columnar p

Assignees

• Toshiba Kk

Inventors

• Akutsu Yoshihiro

Classifications

• H01L27/11582 Primary

  Electricity · mapped topic

• H01L27/1157

  Electricity · mapped topic

• H10B43/27 Primary

  the channels comprising vertical portions, e.g. U-shaped channels · CPC title

• H10B69/00 Primary

  Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices · CPC title

• H10B43/35

  with cell select transistors, e.g. NAND · CPC title