Process for growing at least one nanowire using a transition metal nitride layer obtained in two steps

Patent metadata

Field	Value
Publication number	US-10636653-B2
Application number	US-201314438480-A
Country	US
Kind code	B2
Filing date	Oct 25, 2013
Priority date	Oct 26, 2012
Publication date	Apr 28, 2020
Grant date	Apr 28, 2020

Abstract

The process for growing at least one semiconductor nanowire ( 3 ), said growth process comprising a step of forming, on a substrate ( 1 ), a nucleation layer ( 2 ) for the growth of the nanowire ( 3 ) and a step of growth of the nanowire ( 3 ). The step of formation of the nucleation layer ( 2 ) comprises the following steps: deposition onto the substrate ( 1 ) of a layer of a transition metal ( 4 ) chosen from Ti, V, Cr, Zr, Nb, Mo, Hf, Ta; nitridation of at least a part ( 2 ) of the transition metal layer so as to form a transition metal nitride layer having a surface intended for growing the nanowire ( 3 ).

First claim

The invention claimed is:

1. A process for growing at least one semiconductor nanowire, the growing process comprising:
forming, on a substrate, a nucleation layer for the growth of the nanowire, and
growing the nanowire,
wherein the step of forming the nucleation layer comprises:
depositing onto the substrate a layer of a transition metal selected from the group consisting of Ti, V, Cr, Zr, Nb, Mo, Hf, and Ta, and
performing nitridation of at least part of the transition metal layer so as to form a transition metal nitride layer having a surface intended for the growth of the nanowire,

wherein the substrate is silicon, and wherein a thickness of the transition metal layer before nitridation is in a range of from 2 nm to 50 nm.

2. The process as claimed in claim 1 , wherein the nitridation comprises:
a first nitridation at least partly performed at a first temperature by imposing an injection of a nitridation gas at a first flow rate, and
a second nitridation at least partly performed at a second temperature less than or equal to the first temperature by imposing an injection of the nitridation gas at a second flow rate which may or may not be different from the first flow rate.

3. The process as claimed in claim 2 , wherein the injected nitridation gas is ammonia, and wherein:
the first temperature is between 1000° C. and 1050° C.,
the first flow rate is between 500*V/8 sccm and 2500*V/8 sccm,
the second temperature is between 950° C. and 1050° C., and
the second flow rate is between 500*V/8 sccm and 2500*V/8 sccm,
wherein V is a total capacity in liters of a corresponding nitridation chamber.

4. The process as claimed in claim 2 , wherein the nitridation is performed in a nitridation chamber placed at a pressure of between 50 mbar and 800 mbar.

5. The process as claimed in claim 2 , wherein the growing of the nanowire is performed after the second nitridation.

6. The process as claimed in claim 1 , wherein the growing of the nanowire comprises injecting Ga so as to form the nanowire as a gallium nitride nanowire, the nanowire extending from the growth surface of the nucleation layer.

7. The process as claimed in claim 1 , wherein the substrate is silicon, and wherein the depositing of the transition metal layer is configured so that interdiffusion of silicon into the deposited transition metal layer is less than 10 nm and/or so as to conserve a non-silicidized slice of the transition metal layer of at least 2 nm.

8. The process as claimed in claim 1 , wherein the deposited transition metal is chosen from Cr, V and Ti, and wherein the transition metal is deposited at a temperature below 100° C.

9. The process as claimed in claim 1 , wherein the depositing of the transition metal layer and the nitridation are implemented before the growth step.

10. A process for manufacturing an optoelectronic device, comprising:
growing a nanowire by the process as claimed in claim 1 ,
performing doping with a dopant of a first type of an end of the nanowire opposite the substrate so as to modify the electrical properties of the end of the nanowire opposite the substrate, and
forming an element doped with a dopant of a second type opposite the first type at the end of the nanowire opposite the substrate so as to modify the electrical properties of the element.

11. The process as claimed in claim 1 , wherein the transition metal is selected from the group consisting of V, Cr, Nb, Mo, and Ta, and a crystallographic structure of the transition metal nitride layer is a face-centered cubic crystallographic structure.

12. The process as claimed in claim 11 , wherein the face-centered cubic crystallographic structure is oriented so that the nanowire is grown along a [111] direction of the face-centered cubic crystallographic structure of the transition metal nitride layer.

13. The process as claimed in claim 1 , wherein the transition metal is selected from the group consisting of Ti, Zr, and Hf, and a crystallographic structure of the transition metal nitride layer is a hexagonal crystallographic structure.

14. The process as claimed in claim 13 , wherein the hexagonal crystallographic structure is oriented so that the nanowire is grown along a [0001] direction of the hexagonal crystallographic structure of the transition metal nitride layer.

15. The process as claimed in claim 3 , wherein at least one of:
the first temperature is equal to 1050° C.,
the first flow rate is equal to 1600*V/8 sccm,
the second temperature is equal to 1000° C., and
the second flow rate is equal to 500*V/8 sccm.

16. The process as claimed in claim 4 , wherein the nitridation chamber is placed at a pressure of 100 mbar.

17. The process as claimed in claim 1 , wherein the nitridation of the transition metal layer is performed so as to at least partly modify the transition metal layer into a transition metal nitride layer having a face-centered cubic crystallographic structure or a hexagonal crystallographic structure.

18. The process as claimed in claim 1 , wherein interdiffusion of silicon into the deposited transition metal layer is less than 10 nm.

19. The process as claimed in claim 1 , wherein the transition metal layer includes a non-silicidized slice of at least 2 nm.

20. The process as claimed in claim 1 , wherein the nanowire is oriented substantially perpendicular to the substrate.

Assignees

• Commissariat Energie Atomique
• Aledia

Inventors

• Hyot Bérangère
• Amstatt Benoit
• Armand Marie-Françoise
• Dupont Florian

Classifications

• H10P14/279

  Vapour-liquid-solid growth · CPC title

• H10P74/203

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P14/3462

  Nanowires · CPC title

• H10P14/3416

  Nitrides · CPC title

• H10P14/3258

  Crystal orientation · CPC title