Electronic device containing nanowire(s), equipped with a transition metal buffer layer, process for growing at least one nanowire, and process for manufacturing a device

US9679966B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9679966-B2
Application numberUS-201314064858-A
CountryUS
Kind codeB2
Filing dateOct 28, 2013
Priority dateOct 26, 2012
Publication dateJun 13, 2017
Grant dateJun 13, 2017

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  5. First independent claim

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Abstract

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The electronic device comprises a substrate ( 1 ), at least one semiconductor nanowire ( 2 ) and a buffer layer ( 3 ) interposed between the substrate ( 1 ) and said nanowire ( 2 ). The buffer layer ( 3 ) is at least partly formed by a transition metal nitride layer ( 9 ) from which extends the nanowire ( 2 ), said transition metal nitride being chosen from: vanadium nitride, chromium nitride, zirconium nitride, niobium nitride, molybdenum nitride, hafnium nitride or tantalum nitride.

First claim

Opening claim text (preview).

The invention claimed is: 1. An electronic device comprising a substrate, at least one semiconductor nanowire and a buffer layer interposed between the substrate and said nanowire, wherein the buffer layer is at least partly formed by a transition metal nitride layer from which extends the nanowire, said nanowire being in direct contact with the transition metal nitride layer, said transition metal nitride being chosen from: vanadium nitride, chromium nitride, zirconium nitride, niobium nitride, molybdenum nitride, hafnium nitride or tantalum nitride, wherein the transition metal nitride layer comprises nitrogen, the concentration of which in the stable state of the transition metal nitride varies within a range of less than or equal to 10%. 2. The device as claimed in claim 1 , wherein the nanowire is made of gallium nitride. 3. The device as claimed in claim 1 , wherein the buffer layer is electrically conductive so as to allow an electrical contact between at least one electrically conductive part of the substrate and the nanowire. 4. The device as claimed in claim 1 , wherein the end of the nanowire which is remote from the substrate is electrically doped according to a first type, and wherein the device comprises a doped electrically conductive element of a second type placed at the end of the nanowire which is remote from the substrate so as to form an electric junction. 5. The device as claimed in claim 4 , comprising quantum wells placed at the interface between the nanowire and the doped electrically conductive element. 6. The device as claimed in claim 1 , comprising an element for polarizing the nanowire so as to allow the generation of a light wave at said nanowire. 7. A process for growing at least one semiconductor nanowire comprising producing, on a substrate, a buffer layer formed at least partly by a nucleation layer for the growth of the nanowire and growing the nanowire from the nucleation layer, wherein the nucleation layer is formed by a layer of a transition metal nitride in direct contact with the nanowire, said transition metal nitride being chosen from: vanadium nitride, chromium nitride, zirconium nitride, niobium nitride, molybdenum nitride, hafnium nitride or tantalum nitride so as to obtain the device as claimed in claim 1 . 8. The process as claimed in claim 7 , wherein the buffer layer is deposited as a vapor phase from a gas mixture comprising nitrogen and a transition metal chosen from vanadium, chromium, zirconium, niobium, molybdenum, hafnium or tantalum. 9. The process as claimed in claim 7 , wherein the buffer layer is produced via the following: deposition onto the substrate of a layer of a transition metal chosen from vanadium, chromium, zirconium, niobium, molybdenum, hafnium or tantalum, nitridation of at least part of the deposited transition metal layer so as to form the transition metal nitride layer having a surface intended for the growth of the nanowire. 10. The process as claimed in claim 7 , wherein the transition metal nitride layer is made so that, once formed, the transition metal nitride layer comprises nitrogen, the concentration of which in the stable state of the transition metal nitride varies within a range of less than or equal to 10%. 11. The process as claimed in claim 9 , wherein the nitridation of said at least part of the transition metal layer is performed so as to at least partly modify the crystallographic structure of the transition metal layer toward a face-centered cubic or hexagonal, associated with the transition metal nitride layer. 12. The process as claimed in claim 9 wherein the nitridation comprises: a first nitridation at least partly performed at a first temperature by imposing an injection of a nitridation gas at a first flow rate, a second nitridation at least partly performed at a second temperature less than or equal to the first temperature by imposing an injection of the nitridation gas at a second flow rate different from the first flow rate. 13. The process as claimed in claim 12 , wherein the injected nitridation gas is ammonia, and wherein: the first temperature is in a range of from 1000° C. to 1050° C., the first flow rate is in a range of from 500*V/8 sccm to 2500*V/8 sccm, the second temperature is in a range of from 950° C. to 1050° C., the second flow rate is in a range of from 500*V/8 sccm to 2500*V/8 sccm, in which V is the total capacity in liters of a corresponding nitridation chamber. 14. The process as claimed in claim 12 , wherein the nitridation is performed in a nitridation chamber placed at a pressure in a range of from 50 mbar to 800 mbar. 15. The process as claimed in claim 12 , wherein the growth of the nanowire is at least one of (i) performed after the second nitridation and (ii) initiated during the second nitridation. 16. The process as claimed in claim 7 , wherein the growth of the nanowire comprises injecting Ga so as to form the gallium nitride nanowire, said nanowire extending from a growth surface of the nucleation layer. 17. The process as claimed in claim 9 , wherein the substrate is silicon, and wherein the depositing of the transition metal layer is configured so that at least one of (i) the interdiffusion of silicon into the deposited transition metal layer is less than 10 nm and (ii) a non-silicided slice of the transition metal layer of at least 2 nm is conserved. 18. The process as claimed in claim 9 , wherein the deposited transition metal is chosen from Cr, V or Ti, and wherein said transition metal is deposited at a temperature below 100° C. 19. The process as claimed in claim 9 wherein the substrate is based on silicon, and wherein the depositing the transition metal layer comprises a preliminary determining of the thickness of the transition metal layer to be deposited, comprising: determining a first diffusion length of silicon into the transition metal layer during the future deposition of the transition metal layer as a function of the transition metal used and of the deposition temperature, determining a second diffusion length of silicon into the transition metal layer during the future nitridation of the transition metal layer, wherein the thickness of the transition metal layer to be deposited is dependent on the desired thickness of the transition metal nitride layer and on a thickness of a slice of transition metal silicide obtained in the future transition metal layer from the first and second determined diffusion lengths. 20. The process as claimed in claim 7 , comprising providing the substrate so that the substrate has a resistivity in a range of from 1 mΩ·cm to 100 mΩ·cm. 21. The process as claimed in claim 7 , comprising, before deposition of the transition metal layer, deoxidizing a surface of the substrate intended to receive the transition metal layer. 22. A process for manufacturing a device as claimed in claim 1 , comprising performing the growth process of at least one semiconductor nanowire, wherein the growth process comprises: producing, on a substrate, a buffer layer formed at least partly by a nucleation layer for the growth of the nanowire, and growing the nanowire from the nucleation layer, wherein the nucleation layer is formed by a layer of a transition metal nitride chosen from: vanadium nitride, chromium nitride, zirconium nitride, niobium nitride, molybdenum nitride, hafnium nitride or tantalum nitride. 23. The process as claimed in claim 22 , comprising performing: electrical do

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What does patent US9679966B2 cover?
The electronic device comprises a substrate ( 1 ), at least one semiconductor nanowire ( 2 ) and a buffer layer ( 3 ) interposed between the substrate ( 1 ) and said nanowire ( 2 ). The buffer layer ( 3 ) is at least partly formed by a transition metal nitride layer ( 9 ) from which extends the nanowire ( 2 ), said transition metal nitride being chosen from: vanadium nitride, chromium nitride, …
Who is the assignee on this patent?
Commissariat Energie Atomique
What technology area does this patent fall under?
Primary CPC classification H10P14/2905. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 13 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).