Semiconductor fin length variability control

Patent metadata

Field	Value
Publication number	US-10535529-B2
Application number	US-201816000485-A
Country	US
Kind code	B2
Filing date	Jun 5, 2018
Priority date	Jun 5, 2018
Publication date	Jan 14, 2020
Grant date	Jan 14, 2020

Abstract

Techniques for fin length variability control are provided. In one aspect, a method of patterning fins in a wafer includes: depositing a hardmask and a tone invert layer on the wafer; patterning trenches in the tone invert layer; forming inverse tone etch masks on the hardmask within the trenches, wherein the inverse tone etch masks include inner and outer inverse tone etch masks; forming a save mask with opposite ends thereof aligned with the outer inverse tone etch masks; using the save mask to selectively remove unmasked portions of the tone invert layer; removing the outer inverse tone etch masks, wherein the inner inverse tone etch masks that remain have a uniform length L; patterning the hardmask into individual fin hardmasks using the inner inverse tone etch masks; and patterning fins in the wafer using the fin hardmasks. A device having fins of a uniform length L is also provided.

First claim

What is claimed is:

1. A method of patterning fins in a wafer, the method comprising the steps of:
depositing a hardmask on the wafer;
depositing a tone invert layer on the hardmask;
patterning trenches in the tone invert layer;
forming inverse tone etch masks on the hardmask within the trenches patterned in the tone invert layer, wherein the inverse tone etch masks comprise inner inverse tone etch masks between two outer inverse tone etch masks;
forming a save mask on the tone invert layer with opposite ends of the save mask being aligned with the outer inverse tone etch masks;
using the save mask to selectively remove unmasked portions of the tone invert layer to expose the outer inverse tone etch masks;
removing the outer inverse tone etch masks, wherein the inner inverse tone etch masks that remain have a uniform length L;
patterning the hardmask into a plurality of individual fin hardmasks using the inner inverse tone etch masks; and
patterning a plurality of fins in the wafer using the plurality of individual fin hardmasks.

2. The method of claim 1 , wherein the hardmask comprises a nitride hardmask material selected from the group consisting of: silicon nitride (SiN), silicon oxycarbonitride (SiOCN), and combinations thereof.

3. The method of claim 1 , wherein the hardmask comprises amorphous silicon disposed on a nitride hardmask material.

4. The method of claim 1 , wherein the tone invert layer comprises a material selected from the group consisting of: SiO 2 , SiOC, and combinations thereof.

5. The method of claim 1 , wherein the trenches patterned in the tone invert layer have a width W, the method comprising the step of:
reducing the width W to a width W′, wherein W>W′.

6. The method of claim 5 , wherein W is from about 10 nm to about 20 nm and ranges therebetween, and wherein W′ is from about 2 nm to about 15 nm and ranges therebetween.

7. The method of claim 5 , further comprising the step of:
depositing additional tone invert material onto the tone invert layer including along sidewalls of the trenches to reduce the width W to the width W′.

8. The method of claim 7 , wherein the additional tone invert material comprises a same material as the tone invert layer.

9. The method of claim 7 , wherein the additional tone invert material is deposited using a process selective for deposition of the additional tone invert material on the tone invert layer rather than on the hardmask.

10. The method of claim 7 , further comprising the step of:
etching back the additional tone invert material to expose the hardmask at bottoms of the trenches.

11. The method of claim 1 , wherein the inverse tone etch masks comprise a nitride material selected from the group consisting of: SiN, SiOCN, and combinations thereof.

12. The method of claim 1 , wherein the inverse tone etch masks comprise a metal oxide selected from the group consisting of: titanium dioxide (TiO 2 ), ruthenium oxide (RuO 2 ), and combinations thereof.

13. The method of claim 1 , further comprising the step of:
growing the inverse tone etch masks up from the hardmask exposed at bottoms of the trenches.

14. The method of claim 1 , further comprising the steps of:
treating a surface of the hardmask prior to depositing the tone invert layer on the hardmask; and
depositing the inverse tone etch masks into the trenches using area-selective deposition on the treated surface of the hardmask.

15. The method of claim 1 , wherein the step of forming the save mask comprises the steps of:
depositing a lithography stack on the tone invert layer;
forming a patterned resist on the lithography stack with a footprint and a location of the save mask; and
patterning the lithography stack using the patterned resist.

16. The method of claim 15 , wherein the patterned resist has rounded corners.

17. The method of claim 1 , wherein the outer inverse tone etch masks are removed using an isotropic etching process.

Assignees

• IBM

Inventors

• Joseph Praveen
• De Silva Ekmini A
• Sieg Stuart A
• Miller Eric

Classifications

• H10P50/692

  characterised by their composition, e.g. multilayer masks or materials · CPC title

• H10P50/695 Primary

  characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

• H01L21/3086 Primary

  Electricity · mapped topic

• H01L29/785

  Electricity · mapped topic

• H01L21/823431

  Electricity · mapped topic