Target location in semiconductor manufacturing

US10504802B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10504802-B2
Application numberUS-201715576811-A
CountryUS
Kind codeB2
Filing dateOct 24, 2017
Priority dateNov 9, 2016
Publication dateDec 10, 2019
Grant dateDec 10, 2019

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Abstract

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A method of overlay control in silicon wafer manufacturing comprises firstly locating a target comprising a diffraction grating on a wafer layer; and then measuring the alignment of patterns in successive layers of the wafer. The location of the target may be done by the pupil camera rather than a vision camera by scanning the target to obtain pupil images at different locations along a first axis. The pupil images may comprise a first order diffraction pattern for each location. A measurement of signal intensity in the first order diffraction pattern is then obtained for each location. The variation of signal intensity with location along each axis is then analyzed to calculate the location of a feature in the target.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of target location in a semiconductor manufacturing process, wherein a target comprises a diffraction grating, the method comprising: acquiring the target based on a coarse location of a feature; scanning the target to capture pupil images at different locations along a first axis and a second axis, wherein the pupil images comprise a first order diffraction pattern for each of the different locations, and wherein the second axis is perpendicular to the first axis; obtaining a measurement of signal intensity in the first order diffraction pattern for each of the different locations; analyzing a variation of signal intensity with location along the first axis and the second axis to calculate a position vector of the feature of the target along the first axis and the second axis; and calculating a shift between the coarse location and the calculated position vector by an image analysis unit. 2. The method of claim 1 wherein the first order diffraction pattern comprises positive and negative first order diffraction patterns. 3. The method of claim 2 wherein obtaining a measurement of signal intensity comprises calculating an average signal intensity or a total signal intensity of the positive and negative first order diffraction patterns. 4. The method of claim 2 wherein the feature is a center of the target. 5. The method of claim 1 wherein the feature is a center of the target. 6. The method of claim 1 wherein said target comprises a plurality of cells, said scanning comprises scanning a single cell, and said feature comprises a center of said single cell or an edge of said single cell. 7. The method of claim 1 wherein said target comprises a plurality of cells, said scanning comprises scanning more than one cell along an axis continuing from one cell to another, and said feature comprises a boundary between two cells, an edge of a cell, or a center of a cell. 8. A computer readable medium comprising instructions which when implemented in a processor of a semiconductor metrology system cause the system to operate according to the method of claim 1 . 9. The method of claim 1 , further comprising moving the target an amount along the first axis and the second axis that corresponds to the position vector. 10. A method of overlay control in silicon wafer manufacturing comprising: acquiring a target based on a coarse location of a feature; locating the target comprising a diffraction grating on a wafer layer; measuring an overlay in successive layers of the wafer; wherein locating the target comprises: scanning the target to capture pupil images at different locations along a first axis and a second axis, wherein the pupil images comprise a first order diffraction pattern for each of the different locations, and wherein the second axis is perpendicular to the first axis; obtaining a measurement of signal intensity in the first order diffraction pattern for each of the different locations; and analyzing a variation of signal intensity with location along the first axis and the second axis to calculate a position vector of the feature in the target along the first axis and the second axis; and calculating a shift between the coarse location and the calculated position vector by an image analysis unit. 11. The method of claim 10 comprising moving the wafer by an amount corresponding to the shift. 12. The method of claim 10 wherein the same camera is used to locate the target and measure the overlay. 13. The method of claim 12 wherein the same measurement settings for a pupil camera are used for locating the target and for measuring alignment. 14. The method claim 10 wherein signal intensity data used to determine the location of said feature is used to measure alignment of patterns in successive layers of the wafer. 15. The method claim 10 wherein signal intensity data used to determine the location of said feature is used to measure alignment of patterns in successive layers of the wafer. 16. A semiconductor metrology system comprising: an imaging system comprising an illumination source for illuminating a target based on a coarse location of a feature on a wafer and a pupil camera for capturing light returned from said target; a controller configured to control the imaging system to scan the target to capture pupil images at different locations along a first axis and a second axis, wherein the pupil images comprise a first order diffraction pattern for each of the different locations along the first axis and the second axis, and wherein the second axis is perpendicular to the first axis; and an image analysis unit configured to obtain a measurement of signal intensity in the first order diffraction pattern for each of the different locations along said first axis and the second axis, analyze variation of signal intensity with location along the first axis and the second axis to calculate a position vector of a feature in the target along the first axis and the second axis, and calculate a shift between the coarse location and the calculated position vector. 17. The system of claim 16 further configured to measure alignment of patterns in successive layers of the wafer using data from said pupil images. 18. The system of claim 17 comprising a movable stage for supporting the wafer in which the controller is configured to control movement of the stage according to the calculated location of the feature. 19. The system of claim 16 comprising a movable stage for supporting the wafer in which the controller is configured to control movement of the stage according to the calculated location of the feature. 20. The system of claim 16 , wherein: the imaging system further comprises: a beam splitter; a collimator disposed between the beam splitter and the illumination source along a first optical axis, wherein the first optical axis passes through the beam splitter and the illumination source; an apodizer disposed between the beam splitter and the collimator along the first optical axis; a movable stage for supporting the wafer in which the controller is configured to control movement of the stage according to the calculated location of the feature; an objective disposed between the beam splitter and the wafer along a second optical axis, wherein the second optical axis passes through the beam splitter and the movable stage; a focus lens disposed between the beam splitter and the pupil camera disposed along a third optical axis, wherein the third optical axis passes through the beam splitter and the pupil camera; and a field stop disposed between the focus lens and the pupil camera along the third optical axis; and the controller is configured to receive electronic input from the image analysis unit.

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Classifications

  • H10P74/203Primary

    Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • Process monitoring, e.g. flow or thickness monitoring · CPC title

  • H10P74/23Primary

    characterised by multiple measurements, corrections, marking or sorting processes · CPC title

  • for measuring angles or tapers; for testing the alignment of axes · CPC title

  • for measuring distance or clearance between spaced objects or spaced apertures (G01B11/26 takes precedence; rangefinders G01C3/00) · CPC title

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What does patent US10504802B2 cover?
A method of overlay control in silicon wafer manufacturing comprises firstly locating a target comprising a diffraction grating on a wafer layer; and then measuring the alignment of patterns in successive layers of the wafer. The location of the target may be done by the pupil camera rather than a vision camera by scanning the target to obtain pupil images at different locations along a first a…
Who is the assignee on this patent?
Kla Tencor Corp
What technology area does this patent fall under?
Primary CPC classification H10P74/203. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 10 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).