Microcell interconnection in silicon photomultipliers

US10371835B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10371835-B2
Application numberUS-201614992635-A
CountryUS
Kind codeB2
Filing dateJan 11, 2016
Priority dateJan 11, 2016
Publication dateAug 6, 2019
Grant dateAug 6, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A silicon photomultiplier array including a plurality of microcells arranged in rows and columns. A plurality of circuit traces connecting microcell output ports to the array pixel output port, with one or more impedance matching networks connected to at least one of the circuit traces. The impedance matching networks can be connected between each row circuit trace and the pixel output port. Impedance matching networks can be located between junctions of adjacent microcell output ports and row circuit traces.

First claim

Opening claim text (preview).

The invention claimed is: 1. A silicon photomultiplier array comprising: a plurality of microcells within the photomultiplier array, the plurality of microcells arranged in rows and columns; each of the plurality of microcells including an output port, and configured to provide a pulse waveform having pulse characteristics; a plurality of circuit traces connecting the output port of the plurality of microcells to a pixel output port of the silicon photomultiplier array; and an impedance matching circuit for each row of microcells, the impedance matching circuit connected to at least one of the circuit traces and located between a junction of each microcell output port of a last column and the pixel output port of the silicon photomultiplier array, wherein the impedance matching circuit is one of a single stub, a double stub, a lumped-element, and a stepped transmission line. 2. The silicon photomultiplier array of claim 1 , including the circuit traces constructed as transmission lines. 3. The silicon photomultiplier array of claim 2 , the transmission lines being one of a slot line, a microstrip, and a stripline. 4. The silicon photomultiplier array of claim 1 , including one impedance matching circuit connected between each circuit trace of each row and the pixel output port.

Assignees

Inventors

Classifications

  • Circuits specially adapted for scintillation detectors, e.g. for the photo-multiplier section · CPC title

  • G01T1/248Primary

    Silicon photomultipliers [SiPM], e.g. an avalanche photodiode [APD] array on a common Si substrate · CPC title

  • Electricity · mapped topic

  • Detector read-out circuitry (for processing gain or off-set correction H04N) · CPC title

  • X-ray, gamma-ray or corpuscular radiation imagers · CPC title

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What does patent US10371835B2 cover?
A silicon photomultiplier array including a plurality of microcells arranged in rows and columns. A plurality of circuit traces connecting microcell output ports to the array pixel output port, with one or more impedance matching networks connected to at least one of the circuit traces. The impedance matching networks can be connected between each row circuit trace and the pixel output port. Im…
Who is the assignee on this patent?
Gen Electric
What technology area does this patent fall under?
Primary CPC classification G01T1/248. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 06 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).