Silicon photomultipliers with internal calibration circuitry

Patent metadata

Field	Value
Publication number	US-9854231-B2
Application number	US-201414574836-A
Country	US
Kind code	B2
Filing date	Dec 18, 2014
Priority date	Dec 18, 2014
Publication date	Dec 26, 2017
Grant date	Dec 26, 2017

Abstract

A silicon photomultiplier includes a plurality of microcells providing a pulse output in response to an incident radiation, each microcell including circuitry configured to enable and disable the pulse output. Each microcell includes a cell disable switch. The control logic circuit controls the cell disable switch and a self-test circuit. A microcell's pulse output is disabled when the cell disable switch is in a first state. A method for self-test calibration of microcells includes providing a test enable signal to the microcells, integrating dark current for a predetermined time period, comparing the integrated dark current to a predetermined threshold level, and providing a signal if above the predetermined threshold level.

First claim

The invention claimed is:

1. A silicon photomultiplier array comprising:
a plurality of microcells each providing a pulse output in response to an incident radiation, each microcell including circuitry configured to enable and disable the pulse output; each of the plurality of microcells including a cell disable switch and a self-test circuit, wherein the pulse output is disabled when the cell disable switch is in a first state;
a row counter connected to a predefined row among the plurality of microcells, and configured to count a latch signal output of each microcell of the predefined row; and
a pixel controller connected to the row counter, the pixel controller configured to provide a signal to a control logic circuit of each of the plurality of microcells, wherein the row counter provides a dark count high indication signal to the pixel controller.

2. The silicon photomultiplier array of claim 1 , wherein the pixel controller is configured to monitor the dark count high indication signal and, if the dark count high indication is below a predetermined threshold of inhibited microcells, provide an inhibit signal to the plurality of microcells.

3. The silicon photomultiplier array of claim 2 , wherein the pixel controller is configured to remove the inhibit signal if the dark count high indication is above a predetermined number of inhibited microcells.

4. The silicon photomultiplier array of claim 1 , further comprising a control logic circuit for providing a configure cell signal to components of its respective microcell.

5. The silicon photomultiplier array of claim 4 , wherein the configure cell signal is operative to cause a change in a comparator threshold voltage reference of the respective microcell.

6. The silicon photomultiplier array of claim 1 , further comprising a pixel summer connected to the pulse output of each of the plurality of microcells.

7. The silicon photomultiplier array of claim 1 , wherein the self-test circuit is configured to provide a latch signal in response to a self-test operation.

8. The silicon photomultiplier array of claim 7 , further comprising a second control logic circuit configured to provide a control signal to the cell disable switch based on a pixel controller signal and a signal provided by a latch circuit, the control signal causing the cell disable switch to change between two states.

9. A silicon photomultiplier array comprising:
a plurality of microcells for providing a pulse output in response to an incident radiation, each microcell including circuitry configured to enable and disable the pulse output;
each of the plurality of microcells including a cell disable switch and a self-test circuit, wherein the pulse output is disabled when the cell disable switch is in a first state;
each of the plurality of microcells including:
an avalanche photodiode having an anode terminal and a cathode terminal;
a first operational amplifier having an output terminal, a first input terminal in electrical communication with the cathode terminal and a second input terminal connected to a reference voltage level;
a second operational amplifier having an input in electrical communication with the first operational amplifier output, the second operational amplifier having another input connected to a threshold voltage and an output in electrical communication with a one shot pulse circuit;
a one shot pulse circuit configured to generate the pulse output; and
a latch circuit in electrical communication with the second operational amplifier output.

10. The silicon photomultiplier array of claim 9 , wherein the first operational amplifier is configured as a current sense amplifier.

11. The silicon photomultiplier array of claim 9 , further comprising a quenching circuit connected in series with the cathode terminal.

12. The silicon photomultiplier array of claim 9 , further comprising a pixel controller configured to monitor the dark count high indication signal and, if the dark count high indication is below a predetermined threshold of inhibited microcells, provide an inhibit signal to the plurality of microcells.

13. The silicon photomultiplier array of claim 12 , wherein the pixel controller is configured to remove the inhibit signal if the dark count high indication is above a predetermined number of inhibited microcells.

14. The silicon photomultiplier array of claim 9 , further comprising a control logic circuit for providing a configure cell signal to components of its respective microcell.

15. The silicon photomultiplier array of claim 14 , wherein the configure cell signal is operative to cause a change in a comparator threshold voltage reference of the respective microcell.

16. The silicon photomultiplier array of claim 9 , further comprising a pixel summer connected to the pulse output of each of the plurality of microcells.

17. The silicon photomultiplier array of claim 9 , wherein the self-test circuit is configured to provide a latch signal in response to a self-test operation.

18. The silicon photomultiplier array of claim 16 , further comprising a control logic circuit configured to provide a control signal to the cell disable switch based on a pixel controller signal and a signal provided by the latch circuit, the control signal causing the cell disable switch to change between two states.

Assignees

• Gen Electric

Inventors

• Guo Jianjun
• Dolinsky Sergei Ivanovich

Classifications

• G01T1/208

  Circuits specially adapted for scintillation detectors, e.g. for the photo-multiplier section · CPC title

• G01T1/248

  Silicon photomultipliers [SiPM], e.g. an avalanche photodiode [APD] array on a common Si substrate · CPC title

• H04N17/002 Primary

  for television cameras · CPC title

• G01T1/2018 Primary

  Scintillation-photodiode combinations · CPC title

• H04N5/341

  Electricity · mapped topic