Gated CDS integrator
US-9985594-B2 · May 29, 2018 · US
US10218312B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10218312-B2 |
| Application number | US-201715444021-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 27, 2017 |
| Priority date | Feb 29, 2016 |
| Publication date | Feb 26, 2019 |
| Grant date | Feb 26, 2019 |
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Certain aspects of the present disclosure provide an amplifier for signal amplification. Certain aspects further describe methods and apparatus for applying overload protection for such amplifier. For example, one method generally includes detecting an overload condition of an amplifier based on a signal at a node of the amplifier, and controlling a parameter of an input signal of the amplifier such that the parameter of the input signal is maintained below a threshold based on the detection of the overload condition. The parameter of the input signal may include, for example, a voltage level or a duty cycle of the input signal.
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What is claimed is: 1. A method for overload protection, comprising: detecting an overload condition of an amplifier based on a signal at a node of the amplifier; and controlling a parameter of an input signal of the amplifier such that the parameter of the input signal is maintained at or below a first threshold until the overload condition is no longer detected, wherein controlling the parameter comprises decreasing the parameter of the input signal while the amplifier is in the overload condition, wherein the parameter of the input signal comprises a voltage level of the input signal or a duty cycle of the input signal. 2. The method of claim 1 , wherein the signal at the node comprises the input signal, and wherein the parameter of the input signal comprises a duty cycle of the input signal. 3. The method of claim 1 , wherein the node comprises an input node of an output stage of the amplifier, an input node of one or more drivers configured to drive the input node of the output stage, or an output node of the output stage of the amplifier. 4. The method of claim 1 , wherein the signal at the node comprises a pulse-width modulation (PWM) signal, and wherein the overload condition of the amplifier is detected based on a duty cycle of the PWM signal. 5. The method of claim 1 , wherein detecting the overload condition is further based on at least one of the input signal or a feedback signal of the amplifier. 6. The method of claim 1 , further comprising: adjusting a value of a counter based on the detection; and comparing the value of the counter to a second threshold, wherein controlling the input signal is performed in response to the value of the counter exceeding the second threshold. 7. The method of claim 6 , wherein detecting the overload condition comprises comparing a duty cycle of the signal at the node with a third threshold. 8. The method of claim 7 , wherein adjusting the value of the counter comprises: incrementing the counter if the duty cycle exceeds the third threshold; and decrementing the counter if the duty cycle does not exceed the third threshold. 9. The method of claim 7 , wherein controlling the parameter of the input signal comprises decreasing a voltage of the input signal until the value of the counter no longer exceeds the second threshold. 10. The method of claim 9 , wherein controlling the parameter of the input signal further comprises increasing the voltage of the input signal if the value of the counter no longer exceeds the second threshold. 11. The method of claim 1 , wherein the signal at the node of the amplifier comprises a power supply voltage of the amplifier, and wherein detecting the overload condition is based on a rate of change of the power supply voltage. 12. The method of claim 1 , wherein decreasing the voltage level of the input signal comprises decreasing the parameter of the input signal periodically. 13. An apparatus for signal amplification, comprising: an amplifier configured to generate an amplified signal based on an input signal; and a circuit coupled to a node of the amplifier and configured to: detect an overload condition of the amplifier based on a signal at the node; and control a parameter of the input signal of the amplifier such that the parameter of the input signal is maintained at or below a first threshold until the overload condition is no longer detected, wherein controlling the parameter comprises decreasing the parameter of the input signal while the amplifier is in the overload condition, wherein the parameter of the input signal comprises a voltage level of the input signal or a duty cycle of the input signal. 14. The apparatus of claim 13 , wherein the signal at the node comprises the input signal, and wherein the parameter of the input signal comprises a duty cycle of the input signal. 15. The apparatus of claim 13 , wherein the node comprises an input node of an output stage of the amplifier, an input node of one or more drivers configured to drive the input node of the output stage, or an output node of the output stage of the amplifier. 16. The apparatus of claim 13 , wherein the signal at the node comprises a pulse-width modulation (PWM) signal, and wherein the circuit is configured to detect the overload condition of the amplifier based on a duty cycle of the PWM signal. 17. The apparatus of claim 13 , wherein the circuit is further configured to detect the overload condition based on at least one of the input signal or a feedback signal of the amplifier. 18. The apparatus of claim 13 , wherein the circuit is further configured to: adjust a value of a counter based on the detection; and compare the value of the counter to a second threshold, wherein the circuit is configured to control the parameter of the input signal in response to the value of the counter exceeding the second threshold. 19. The apparatus of claim 18 , wherein the circuit is further configured to detect the overload condition by comparing a duty cycle of the input signal with a third threshold. 20. The apparatus of claim 19 , wherein the circuit is configured to adjust the value of the counter by: incrementing the counter if the duty cycle exceeds the third threshold; and decrementing the counter if the duty cycle does not exceed the third threshold. 21. The apparatus of claim 19 , wherein the circuit is configured to control the parameter of the input signal by increasing the parameter of the input signal if the value of the counter no longer exceeds the second threshold. 22. The apparatus of claim 13 , further comprising: a power supply, wherein the signal at the node comprises a power supply voltage generated by the power supply to power an output stage of the amplifier, wherein the circuit is configured to detect the overload condition based on a rate of change of the power supply voltage. 23. The apparatus of claim 13 , wherein the circuit is configured to decrease the parameter of the input signal periodically. 24. An apparatus for signal amplification, comprising: means for generating an amplified signal based on an input signal; means for detecting an overload condition of the means for generating based on a signal at a node of the means for generating; and means for controlling a parameter of the input signal such that the parameter of the input signal is maintained at or below a threshold based on the detection of the overload condition until the overload condition is no longer detected, wherein the means for controlling comprises means for decreasing the parameter of the input signal while the means for generating is in the overload condition, wherein the parameter of the input signal comprises a voltage level of the input signal or a duty cycle of the input signal. 25. The apparatus of claim 24 , wherein the signal at the node comprises the input signal.
with field-effect devices (H03F3/187 takes precedence) · CPC title
for amplifiers using field-effect devices (H03F1/526 takes precedence) · CPC title
with field-effect devices (H03F3/2173 - H03F3/2178 take precedence) · CPC title
of the bridge type · CPC title
Pulse width modulation being used in an amplifying circuit · CPC title
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