Digital amplifier

Patent metadata

Field	Value
Publication number	US-9083283-B2
Application number	US-201414540296-A
Country	US
Kind code	B2
Filing date	Nov 13, 2014
Priority date	Mar 11, 2010
Publication date	Jul 14, 2015
Grant date	Jul 14, 2015

Abstract

A digital amplifier includes a switch, a driving unit, an input signal detector, a control unit and a delay unit. The switch amplifies a signal input to the digital amplifier. The driving unit turns the switch on and off. The input signal detector detects whether an input signal is input to the digital amplifier. The control unit controls the switch to start switching when a signal is input to the digital amplifier and detected. The control unit controls the switch to stop the switching operation by stopping the driving of the driving unit, when the signal is not input to the digital amplifier and not detected. The delay unit delays an input signal to the digital amplifier by a predetermined time until the switching is started, so as to be transmitted to the switch. The switch amplifies the input signal sent to the digital amplifier via the delay unit.

First claim

The invention claimed is:

1. A digital amplifier which amplifies a signal, comprising:
a switching unit that amplifies a signal input to the digital amplifier by performing a switching operation;
a driving unit that turns the switching unit on and off;
an input signal detection unit that detects whether or not there is an input signal to the digital amplifier;
a first control unit that performs control such that the switching unit starts a switching operation by starting driving of the driving unit, when the digital amplifier is changed from a no signal input state to a signal input state and the input signal detection unit detects an input signal to the digital amplifier, and performs control such that the switching unit stops the switching operation by stopping the driving of the driving unit, when the digital amplifier is changed from a signal input state to a no signal input state, and the input signal detection unit does not detect an input signal to the digital amplifier; and
a delay unit that delays an input signal to the digital amplifier by a predetermined time until the switching operation is started, so as to be transmitted to the switching unit,
wherein the switching unit amplifies the input signal to the digital amplifier which is sent via the delay unit.

2. The digital amplifier according to claim 1 , further comprising:
a switch unit that opens and closes a path where an amplified signal output from the switching unit is output from the digital amplifier,
wherein the first control unit controls the switch unit so as to close the path, when the digital amplifier is changed from a no signal input state to a signal input state, and the input signal detection unit detects an input signal to the digital amplifier, and controls the switch unit so as to open the path, when the digital amplifier is changed from a signal input state to a no signal input state, and the input signal detection unit does not detect an input signal to the digital amplifier.

3. The digital amplifier according to claim 1 , further comprising:
a switch unit that opens and closes a path where an amplified signal output from the switching unit is output from the digital amplifier; and
a logical operation unit that outputs a logical sum signal where an output signal of the delay unit is convoluted on an input signal to the digital amplifier,
wherein the input signal detection unit detects presence and absence of the logical sum signal output from the logical operation unit,
wherein the first control unit performs control such that the switching unit starts a switching operation by starting driving of the driving unit and controls the switch unit so as to close the path, when the digital amplifier is changed from a no signal input state to a signal input state and the input signal detection unit detects the logical sum signal, and performs control such that the switching unit stops the switching operation by stopping the driving of the driving unit and controls the switch unit so as to open the path, when the digital amplifier is changed from a signal input state to a no signal input state and the input signal detection unit does not detect the logical sum signal.

4. The digital amplifier according to claim 2 ,
wherein timing when the path is closed based on the control of the first control unit is within a delay time of a signal by the delay unit and is later than timing when the switching unit starts a switching operation based on the control of the first control unit, and
wherein timing when the path is opened based on the control of the first control unit is earlier than timing when the switching unit stops the switching operation based on the control of the first control unit.

5. The digital amplifier according to claim 1 ,
wherein the switching operation is an operation where two switching elements connected in series included in the switching unit are alternately turned on and off,
wherein the digital amplifier further includes
a dead time control unit that controls the driving unit such that both of the two switching elements are turned off when the switching unit performs a switching operation; and
a dead time setting unit that sets time when both of the two switching elements are turned off by the dead time control unit, and
wherein the dead time setting unit sets time when both of the two switching elements are turned off, to be longer than a typical time for a predetermined time, when the digital amplifier is changed from a no signal input state to a signal input state and the input signal detection unit detects an input signal to the digital amplifier.

6. The digital amplifier according to claim 3 ,
wherein timing when the path is closed based on the control of the first control unit is within a delay time of a signal by the delay unit and is later than timing when the switching unit starts a switching operation based on the control of the first control unit, and
wherein timing when the path is opened based on the control of the first control unit is earlier than timing when the switching unit stops the switching operation based on the control of the first control unit.

Assignees

• Panasonic Corp
• Roland Corp

Inventors

• Sugawara Hiroshi
• Sasaki Hisayuki
• Niwayama Shigeki
• Maeda Yoshiki
• Takano Toshimi

Classifications

• H03F2200/171

  A filter circuit coupled to the output of an amplifier · CPC title

• H03F2200/324

  An amplitude modulator or demodulator being used in the amplifier circuit · CPC title

• H03F3/217 Primary

  Class D power amplifiers; Switching amplifiers · CPC title

• H03F3/2171

  with field-effect devices (H03F3/2173 - H03F3/2178 take precedence) · CPC title

• H03F1/0222 Primary

  by using a signal derived from the input signal · CPC title