Liner and barrier applications for subtractive metal integration

Patent metadata

Field	Value
Publication number	US-10199235-B2
Application number	US-201815874793-A
Country	US
Kind code	B2
Filing date	Jan 18, 2018
Priority date	Jun 30, 2014
Publication date	Feb 5, 2019
Grant date	Feb 5, 2019

Abstract

Methods and techniques for fabricating metal interconnects, lines, or vias by subtractive etching and liner deposition methods are provided. Methods involve depositing a blanket copper layer, removing regions of the blanket copper layer to form a pattern, treating the patterned metal, depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper, depositing a dielectric barrier layer on the substrate, and depositing a dielectric bulk layer on the substrate.

First claim

What is claimed is:

1. A method comprising:
providing a semiconductor substrate comprising a plurality of patterned metal features formed by performing subtractive etching by plasma-based dry etch on a blanket layer of metal deposited over a first material;
treating the plurality of patterned metal features;
selectively depositing a metal-dielectric interface material on the plurality of patterned metal features selective to the first material on the semiconductor substrate such that the metal-dielectric interface material adheres only to surfaces of the plurality of patterned metal features; and
depositing a dielectric layer on the semiconductor substrate.

2. The method of claim 1 , wherein the treating is performed by a technique selected from the group consisting of: exposing the plurality of patterned metal features to ultraviolet light, and heating the semiconductor substrate comprising the plurality of patterned metal features to a temperature between about 200° C. and about 400° C.

3. The method of claim 1 , wherein depositing the dielectric layer comprises depositing a dielectric barrier layer.

4. The method of claim 1 , wherein performing the subtractive etching to form the patterned metal features comprises:
depositing a blanket metal layer over the semiconductor substrate; and
patterning the blanket metal layer to form the plurality of patterned metal features by removing regions of the blanket metal layer.

5. The method of claim 4 , wherein depositing the blanket metal layer forms grains having a size on average greater than a dimension of one of the plurality of patterned metal features formed by the subtractive etching.

6. The method of claim 1 , further comprising depositing a dielectric barrier layer over the plurality of patterned metal features prior to depositing the dielectric layer.

7. The method of claim 6 , further comprising anisotropically etching the dielectric barrier layer to remove horizontal surfaces of the dielectric barrier layer deposited on the semiconductor substrate, wherein the dielectric barrier layer is deposited conformally over the plurality of patterned metal features.

8. The method of claim 6 , wherein the dielectric barrier layer comprises a high k material, and wherein k is greater than or equal to 3.

9. The method of claim 6 , further comprising etching the dielectric layer to form at least one dielectric spacer, wherein the at least one dielectric spacer comprises material selected from the group consisting of aluminum oxide, SiOC, SiNC, and silicon oxide.

10. The method of claim 1 , wherein the metal-dielectric interface material is cobalt deposited by chemical vapor deposition.

11. The method of claim 1 , wherein depositing the dielectric layer leaves air gaps.

12. The method of claim 1 , wherein the selectively depositing of the metal-dielectric interface material is performed by atomic layer deposition or chemical vapor deposition.

Assignees

• Lam Res Corp

Inventors

• Wu Hui-Jung
• Knisley Thomas Joseph
• Shankar Nagraj
• Shen Meihua
• Hoang John
• Sharma Prithu

Classifications

• H10W20/0633

  using subtractive patterning of the conductive members · CPC title

• H01J2237/334

  Etching · CPC title

• C23C16/16

  from metal carbonyl compounds · CPC title

• H01J37/32357

  Generation remote from the workpiece, e.g. down-stream · CPC title

• C23C16/0245

  by etching with a plasma · CPC title