Data storage device with rewriteable in-place memory

US10147501B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-10147501-B1
Application numberUS-201715607784-A
CountryUS
Kind codeB1
Filing dateMay 30, 2017
Priority dateMay 30, 2017
Publication dateDec 4, 2018
Grant dateDec 4, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

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A data storage device may consist of a non-volatile memory connected to a selection module. The non-volatile memory can have a rewritable in-place memory cell that has a read-write asymmetry. The selection module can dedicate a portion of the non-volatile memory to a data map that can be self-contained along with reactively and proactively altered by the selection module.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising a data storage device consisting of a non-volatile memory connected to a selection module, the non-volatile memory comprising a rewritable in-place memory cell having a read-write asymmetry corresponding to a settle time after a data write, the selection module dedicating a portion of the non-volatile memory to a data map. 2. The apparatus of claim 1 , wherein the rewritable in-place memory cell is bit addressable and comprises a selection layer contacting a resistive unit. 3. The apparatus of claim 2 , wherein the resistive unit contacts a bit line and the selection layer contacts a word line, the bit line oriented orthogonally to the word line. 4. The apparatus of claim 1 , wherein the data map is resident on less than all of the non-volatile memory. 5. The apparatus of claim 1 , wherein the data map comprises translations of logical block addresses (LBA) to physical block addresses (PBA) of data stored in the non-volatile memory. 6. The apparatus of claim 1 , wherein the non-volatile memory has a read latency of one microsecond or less. 7. The apparatus of claim 1 , wherein the non-volatile memory comprises multiple vertically stacked die, each die comprising a plurality of rewritable in-place memory cells. 8. The apparatus of claim 1 , wherein the settle time after a data write corresponds with an increased resistance volatility in the rewritable in-place memory cell. 9. A method comprising activating a data storage device consisting of a non-volatile memory connected to a selection module, the non-volatile memory comprising a rewritable in-place memory cell having a read-write asymmetry; dedicating a portion of the non-volatile memory to a data map with the selection module; and updating the data map in-place with the selection module. 10. The method of claim 9 , wherein the selection module generates multiple different data maps. 11. The method of claim 9 , wherein the selection module services a read request to data written within a settle time of the rewritable in-place memory cell by loading a shadow copy from a buffer memory of the data storage device. 12. The method of claim 9 , wherein the data map is self-contained within the non-volatile memory. 13. The method of claim 9 , wherein the data map represents data stored in the non-volatile memory. 14. The method of claim 9 , wherein the selection module maintains a shadow map in a buffer memory of the data storage device, the buffer memory being separate and different than the non-volatile memory. 15. A method comprising activating a data storage device consisting of a non-volatile memory connected to a selection module, the non-volatile memory comprising a rewritable in-place memory cell having a read-write asymmetry; dedicating a portion of the non-volatile memory to a data map with the selection module; predicting an event with the selection module; and altering the data map to adapt to the predicted event and maintain a performance metric of the data storage device. 16. The method of claim 15 , wherein the selection module updates the data map to adapt to the predicted event. 17. The method of claim 15 , wherein the predicted event is a change in environmental condition. 18. The method of claim 15 , wherein the performance metric is data read latency. 19. The method of claim 18 , wherein the selection module alters the data map by replicating a portion of the data map to a volatile buffer memory. 20. The method of claim 18 , wherein the selection module alters the data map by creating a map hierarchy comprising a first level map and second level map, the first level map stored in a different memory than the second level map.

Assignees

Inventors

Classifications

  • Cell access · CPC title

  • Programming or data input circuits · CPC title

  • Bit line organisation; Bit line lay-out · CPC title

  • by using cryptography (for digital transmission H04L9/00) · CPC title

  • Compressed data · CPC title

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Frequently asked questions

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What does patent US10147501B1 cover?
A data storage device may consist of a non-volatile memory connected to a selection module. The non-volatile memory can have a rewritable in-place memory cell that has a read-write asymmetry. The selection module can dedicate a portion of the non-volatile memory to a data map that can be self-contained along with reactively and proactively altered by the selection module.
Who is the assignee on this patent?
Seagate Technology Llc, Seagate Technology Llc
What technology area does this patent fall under?
Primary CPC classification G11C29/789. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 04 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).