Out-of-Bounds Recovery Circuit
US-2025156267-A1 · May 15, 2025 · US
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Singleton Iain patents
Singleton Iain is listed as an inventor on 56 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Singleton Iain |
| Total patents | 56 |
| First publication | Jul 21, 2016 |
| Latest publication | May 15, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Out-of-bounds recovery circuit
US-12271259-B2 · Apr 8, 2025 · US
Assessing performance of a hardware design using formal evaluation logic
US-2025111115-A1 · Apr 3, 2025 · US
Assessing performance of a hardware design using formal evaluation logic
US-12175179-B2 · Dec 24, 2024 · US
Detecting out-of-bounds violations in a hardware design using formal verification
US-2024411972-A1 · Dec 12, 2024 · US
Livelock detection in a hardware design using formal evaluation logic
US-2024330553-A1 · Oct 3, 2024 · US
Detecting out-of-bounds violations in a hardware design using formal verification
US-12093621-B2 · Sep 17, 2024 · US
Livelock detection in a hardware design using formal evaluation logic
US-12050849-B2 · Jul 30, 2024 · US
Formal verification tool to verify hardware design of memory unit
US-11948652-B2 · Apr 2, 2024 · US
Detecting out-of-bounds violations in a hardware design using formal verification
US-2024020447-A1 · Jan 18, 2024 · US
Recent patents
Latest publications not already listed above.
Livelock recovery circuit for detecting illegal repetition of an instruction and transitioning to a known state
US-11847456-B2 · Dec 19, 2023 · US
Out-of-bounds recovery circuit
US-2023205621-A1 · Jun 29, 2023 · US
Detecting out-of-bounds violations in a hardware design using formal verification
US-11663386-B2 · May 30, 2023 · US
Assessing performance of a hardware design using formal evaluation logic
US-2023094774-A1 · Mar 30, 2023 · US
Out-of-bounds recovery circuit
US-11593193-B2 · Feb 28, 2023 · US
Livelock recovery circuit for detecting illegal repetition of an instruction and transitioning to a known state
US-2023033403-A1 · Feb 2, 2023 · US
Assessing performance of a hardware design using formal evaluation logic
US-11531799-B2 · Dec 20, 2022 · US
Livelock recovery circuit for detecting illegal repetition of an instruction and transitioning to a known state
US-11467840-B2 · Oct 11, 2022 · US
Livelock Detection in a Hardware Design Using Formal Evaluation Logic
US-2022277124-A1 · Sep 1, 2022 · US
Livelock detection in a hardware design using formal evaluation logic
US-11373025-B2 · Jun 28, 2022 · US
Formal verification tool to verify hardware design of memory unit
US-2022139480-A1 · May 5, 2022 · US
Detecting out-of-bounds violations in a hardware design using formal verification
US-2022138389-A1 · May 5, 2022 · US
Detecting out-of-bounds violations in a hardware design using formal verification
US-11250192-B2 · Feb 15, 2022 · US
Formal verification tool to verify hardware design of memory unit
US-11250927-B2 · Feb 15, 2022 · US
Out-of-bounds recovery circuit
US-2021294690-A1 · Sep 23, 2021 · US
Assessing performance of a hardware design using formal evaluation logic
US-2021182463-A1 · Jun 17, 2021 · US
Out-of-bounds recovery circuit
US-11030039-B2 · Jun 8, 2021 · US
Detecting out-of-bounds violations in a hardware design using formal verification
US-2021165942-A1 · Jun 3, 2021 · US
Livelock Detection in a Hardware Design Using Formal Evaluation Logic
US-2021117602-A1 · Apr 22, 2021 · US
Assessing performance of a hardware design using formal evaluation logic
US-10963611-B2 · Mar 30, 2021 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Imagination Tech Ltd | 56 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F30/3323 | 37 |
| G06F11/0754 | 35 |
| G06F30/30 | 33 |
| G06F30/398 | 24 |
| G06F11/3466 | 20 |