Electromigration testing of interconnect analogues having bottom-connected sensory pins
US-9851397-B2 · Dec 26, 2017 · US
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Shinosky Michael A patents
Shinosky Michael A is listed as an inventor on 5 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Shinosky Michael A |
| Total patents | 5 |
| First publication | Jul 16, 2015 |
| Latest publication | Dec 26, 2017 |
Notable patents
Publications ranked by popularity score, then publication date.
Non-planar field effect transistor test structure and lateral dielectric breakdown testing method
US-9453873-B2 · Sep 27, 2016 · US
Electromigration testing of interconnect analogues having bottom-connected sensory pins
US-2016258998-A1 · Sep 8, 2016 · US
Device structure with negative resistance characteristics
US-2016225919-A1 · Aug 4, 2016 · US
Non-planar field effect transistor test structure and lateral dielectric breakdown testing method
US-2015198654-A1 · Jul 16, 2015 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Globalfoundries Inc | 4 |
| IBM | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10P95/00 | 2 |
| G01N1/00 | 2 |
| G01R31/2858 | 2 |
| G01R31/2623 | 2 |
| H01L2221/00 | 1 |