Surround gate vertical field effect transistors including tubular and strip electrodes and method of making the same
US-10707314-B2 · Jul 7, 2020 · US
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Sel Jongsun patents
Sel Jongsun is listed as an inventor on 28 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Sel Jongsun |
| Total patents | 28 |
| First publication | Jan 13, 2015 |
| Latest publication | Jul 7, 2020 |
Notable patents
Publications ranked by popularity score, then publication date.
Metal contact via structure surrounded by an air gap and method of making thereof
US-10319680-B1 · Jun 11, 2019 · US
Array of hole-type surround gate vertical field effect transistors and method of making thereof
US-10290681-B2 · May 14, 2019 · US
Three-dimensional memory device with through-stack contact via structures and method of making thereof
US-10283566-B2 · May 7, 2019 · US
Surround gate vertical field effect transistors including tubular and strip electrodes and method of making the same
US-2019103467-A1 · Apr 4, 2019 · US
Array of hole-type surround gate vertical field effect transistors and method of making thereof
US-2019088717-A1 · Mar 21, 2019 · US
Three-dimensional ReRAM memory device employing replacement word lines and methods of making the same
US-10224373-B2 · Mar 5, 2019 · US
Two-dimensional array of surround gate vertical field effect transistors and method of making thereof
US-2019051703-A1 · Feb 14, 2019 · US
Methods and apparatus for three-dimensional nonvolatile memory
US-2019034125-A1 · Jan 31, 2019 · US
Three-dimensional reram memory device employing replacement word lines and methods of making the same
US-2019006418-A1 · Jan 3, 2019 · US
Recent patents
Latest publications not already listed above.
Three-dimensional memory device with through-stack contact via structures and method of making thereof
US-2018350879-A1 · Dec 6, 2018 · US
Vertical field effect transisitors having a rectangular surround gate and method of making the same
US-10115895-B1 · Oct 30, 2018 · US
Methods and apparatus for three-dimensional nonvolatile memory
US-10115770-B2 · Oct 30, 2018 · US
Methods and apparatus for three-dimensional nonvolatile memory
US-2018247976-A1 · Aug 30, 2018 · US
Three-dimensional memory device with leakage reducing support pillar structures and method of making thereof
US-10014316-B2 · Jul 3, 2018 · US
Three-dimensional memory device with leakage reducing support pillar structures and method of making thereof
US-2018108671-A1 · Apr 19, 2018 · US
Triple patterning NAND flash memory
US-9613806-B2 · Apr 4, 2017 · US
Blocking oxide in memory opening integration scheme for three-dimensional memory structure
US-9601508-B2 · Mar 21, 2017 · US
Blocking oxide in memory opening integration scheme for three-dimensional memory structure
US-2016315095-A1 · Oct 27, 2016 · US
Structures and methods for making NAND flash memory
US-9224475-B2 · Dec 29, 2015 · US
Methods of making word lines and select lines in NAND flash memory
US-9153595-B2 · Oct 6, 2015 · US
Full metal gate replacement process for NAND flash memory
US-9129854-B2 · Sep 8, 2015 · US
Processes for NAND flash memory fabrication
US-9099532-B2 · Aug 4, 2015 · US
Triple Patterning NAND Flash Memory with Stepped Mandrel
US-2015064907-A1 · Mar 5, 2015 · US
Triple Patterning NAND Flash Memory
US-2015064906-A1 · Mar 5, 2015 · US
Triple patterning NAND flash memory with stepped mandrel
US-8969206-B1 · Mar 3, 2015 · US
Triple patterning NAND flash memory with SOC
US-8932955-B1 · Jan 13, 2015 · US
Memory cell floating gate replacement
US-8932948-B2 · Jan 13, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Sandisk Technologies Llc | 18 |
| Sandisk Technologies Inc | 12 |
| Sel Jongsun | 2 |
| Pham Tuan | 2 |
| Tokunaga Kazuya | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10B63/845 | 13 |
| H10B63/34 | 13 |
| H10N70/823 | 13 |
| H10N70/8833 | 11 |
| H10B41/35 | 8 |