Metal contact via structure surrounded by an air gap and method of making thereof

Patent metadata

Field	Value
Publication number	US-10319680-B1
Application number	US-201815909036-A
Country	US
Kind code	B1
Filing date	Mar 1, 2018
Priority date	Mar 1, 2018
Publication date	Jun 11, 2019
Grant date	Jun 11, 2019

Abstract

A structure includes a metal interconnect structure embedded in a lower interconnect level dielectric layer overlying a substrate, at least one material layer overlying the metal interconnect structure, a first contact level dielectric layer overlying the at least one material layer; a metal contact via structure vertically extending through the first contact level dielectric layer and the at least one material layer and contacting a top surface of the metal interconnect structure, and an encapsulated tubular cavity laterally surrounding at least a lower portion of the metal contact via structure, and vertically extending through the at least one material layer.

First claim

What is claimed is:

1. A structure comprising:
a metal interconnect structure embedded in a lower interconnect level dielectric layer overlying a substrate;
at least one material layer overlying the metal interconnect structure;
a first contact level dielectric layer overlying the at least one material layer;
a metal contact via structure vertically extending through the first contact level dielectric layer and the at least one material layer and contacting a top surface of the metal interconnect structure; and
an encapsulated tubular cavity free of any solid material therein, laterally surrounding at least lower portion of the metal contact via structure, and vertically extending through each of the at least one material layer,
wherein the structure comprises at least one feature selected from:
a first feature in which the encapsulated tubular cavity comprises an air gap, and a top portion of the encapsulated tubular cavity extends above a horizontal plane including a bottom surface of the first contact level dielectric layer;
a second feature in which the metal contact via structure includes an upper portion having a greater lateral extent than the lower portion of the metal contact via structure, a peripheral region of the upper portion of the metal contact via structure overhangs the encapsulated tubular cavity, and the encapsulated tubular cavity laterally surrounds only the lower portion of the metal contact via structure and does not surround the peripheral region of the upper portion of the metal contact via structure; or
a third feature in which the metal contact via structure has a top surface within a horizontal plane including a topmost surface of the first contact level dielectric layer, and that the structure further comprises a second contact level dielectric layer overlying the first contact level dielectric layer, wherein an interface between the first and second contact level dielectric layers is recessed below the topmost surface of the first contact level dielectric layer in a region proximal to the metal contact via structure.

2. The structure of claim 1 , wherein the structure comprises the first feature.

3. The structure of claim 1 , wherein the structure comprises the second feature.

4. The structure of claim 3 , wherein portions of an outer sidewall of the encapsulated tubular cavity and sidewalls of the upper portion of the metal contact via structure have a same taper angle with respective to a vertical direction that is perpendicular to a top surface of the substrate.

5. The structure of claim 1 , wherein the structure comprises the third feature.

6. The structure of claim 5 , wherein a dielectric material of the second contact level dielectric layer extends underneath a peripheral region of an upper portion of the metal contact via structure to define an upper surface of the encapsulated tubular cavity.

7. The structure of claim 6 , wherein the dielectric material of the second contact level dielectric layer covers a portion of a sidewall of the first contact level dielectric layer with a variable thickness that increases with a vertical distance from the substrate.

8. The structure of claim 1 , further comprising:
an alternating stack of insulating layers and electrically conductive layers located over the lower interconnect level dielectric layer, wherein stepped surfaces of layers of the alternating stack are provided in a terrace region;
memory stack structures vertically extending through the alternating stack, wherein each of the memory stack structures comprises a memory film and a vertical semiconductor channel laterally surrounded by the memory film;
word line contact via structures located in the terrace region, wherein each of the word line contact via structures contacts a respective one of the electrically conductive layers; and
bit lines overlying the memory stack structures and electrically connected to an upper end of a respective one of the vertical semiconductor channels,
wherein:
there are no cavities surrounding each respective word line contact via structure; and
the metal contact via structure is electrically connected to one of the word line contact via structures or one of the bit lines by direct contact or through at least one upper metal interconnect structure.

9. The structure of claim 1 , wherein:
the structure comprises a monolithic three-dimensional NAND memory device located over the substrate;
the electrically conductive layers comprise, or are electrically connected to, a respective word line of the monolithic three-dimensional NAND memory device;
bottom ends of the memory stack structures contact a planar semiconductor material layer overlying the lower interconnect level dielectric layer;
the monolithic three-dimensional NAND memory device comprises an array of monolithic three-dimensional NAND strings over the planar semiconductor material layer;
at least one memory cell in a first device level of the array of monolithic three-dimensional NAND strings is located over another memory cell in a second device level of the array of monolithic three-dimensional NAND strings;
an integrated circuit comprising a driver circuit for monolithic three-dimensional NAND memory device is located on the substrate underneath the lower contact level dielectric layer;
the electrically conductive layers comprise a plurality of control gate electrodes having a strip shape extending substantially parallel to the top surface of the substrate;
the plurality of control gate electrodes comprises at least a first control gate electrode located in the first device level and a second control gate electrode located in the second device level; and
the array of monolithic three-dimensional NAND strings comprises:
a plurality of semiconductor channels, wherein at least one end portion of each of the plurality of semiconductor channels extends substantially perpendicular to a top surface of the substrate, and
a plurality of charge storage elements, each charge storage element located adjacent to a respective one of the plurality of semiconductor channels.

10. A method of forming a three-dimensional memory device, comprising:
forming a metal interconnect structure embedded in a lower interconnect level dielectric layer over a substrate;
forming at least one material layer and a first contact level dielectric layer over the at least one material layer;
replacing an upper portion of the first contact level dielectric layer overlying the metal interconnect structure with a sacrificial material plate including a first sacrificial material;
forming a via cavity extending through the sacrificial material plate, a lower portion of the first contact level dielectric layer, and the at least one material layer to a top surface of the metal interconnect structure;
forming a sacrificial spacer comprising a second sacrificial material on a sidewall of the via cavity;
forming a metal contact via structure in a remaining volume of the via cavity inside the sacrificial spacer, wherein the metal contact via structure contacts an upper portion of the sidewall of the remaining portion of the sacrificial material plate; and
removing the remaining portion of the sacrificial material plate and the sacrificial spacer to provide a tubular cavity free of any solid material around a lower portion of the metal contact via structure.

11. The method of claim 10 , wherein:
the sacrificial spacer contacts a lower portion of a sidewall of a remaining portion of the sacrificial material plate; and
the metal contact via structure is formed over a convex top surface of the sacrificial spacer, and a peripheral region of an upper portion of the metal contact via

Assignees

• Sandisk Technologies Llc

Inventors

• Sel Jongsun
• Higashitani Masaaki
• Dunga Mohan
• Toyama Fumiaki
• Rabkin Peter

Classifications

• H10W20/076

  in via holes or trenches · CPC title

• H10W20/072

  of dielectric parts comprising air gaps · CPC title

• H10W20/47 Primary

  comprising two or more dielectric layers having different properties, e.g. different dielectric constants · CPC title

• H10W20/46

  comprising air gaps · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title