Test structure for monitoring interface delamination
US-10056306-B2 · Aug 21, 2018 · US
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Milo Gary L patents
Milo Gary L is listed as an inventor on 20 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Milo Gary L |
| Total patents | 20 |
| First publication | May 21, 2015 |
| Latest publication | Aug 21, 2018 |
Notable patents
Publications ranked by popularity score, then publication date.
Semiconductor device with metal extrusion formation
US-9825120-B2 · Nov 21, 2017 · US
Semiconductor device with metal extrusion formation
US-9825119-B2 · Nov 21, 2017 · US
Test strucutre for monitoring interface delamination
US-2017229358-A1 · Aug 10, 2017 · US
Metal wires of a stacked inductor
US-9577023-B2 · Feb 21, 2017 · US
Semiconductor device with metal extrusion formation
US-9548349-B2 · Jan 17, 2017 · US
Semiconductor device with metal extrusion formation
US-2016343797-A1 · Nov 24, 2016 · US
Semiconductor device with metal extrusion formation
US-2016343798-A1 · Nov 24, 2016 · US
Controlled metal extrusion opening in semiconductor structure and method of forming
US-9484301-B2 · Nov 1, 2016 · US
Silicon waveguide structure with arbitrary geometry on bulk silicon substrate, related systems and program products
US-9435948-B2 · Sep 6, 2016 · US
Recent patents
Latest publications not already listed above.
Formation of an asymmetric trench in a semiconductor substrate and a bipolar semiconductor device having an asymmetric trench isolation region
US-9231089-B2 · Jan 5, 2016 · US
Semiconductor device with metal extrusion formation
US-2015380478-A1 · Dec 31, 2015 · US
Silicon waveguide structure with arbitrary geometry on bulk silicon substrate, related systems and program products
US-2015363535-A1 · Dec 17, 2015 · US
Methods of managing metal density in dicing channel and related integrated circuit structures
US-9196592-B2 · Nov 24, 2015 · US
Controlled metal extrusion opening in semiconductor structure and method of forming
US-2015255395-A1 · Sep 10, 2015 · US
Formation of an asymmetric trench in a semiconductor substrate and a bipolar semiconductor device having an asymmetric trench isolation region
US-2015228769-A1 · Aug 13, 2015 · US
Methods of managing metal density in dicing channel and related integrated circuit structures
US-2015200167-A1 · Jul 16, 2015 · US
Controlled metal extrusion opening in semiconductor structure and method of forming
US-9059258-B2 · Jun 16, 2015 · US
Formation of an asymmetric trench in a semiconductor substrate and a bipolar semiconductor device having an asymmetric trench isolation region
US-9059233-B2 · Jun 16, 2015 · US
Formation of an asymmetric trench in a semiconductor substrate and a bipolar semiconductor device having an asymmetric trench isolation region
US-2015137186-A1 · May 21, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 15 |
| Globalfoundries Inc | 4 |
| Globalfoundries Inc | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10P50/73 | 6 |
| H10P50/71 | 6 |
| H10W20/0698 | 6 |
| H10D1/714 | 6 |
| H10D1/042 | 6 |