Processing data using accelerators in a system on a chip
US-2026037330-A1 · Feb 5, 2026 · US
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Krishnan Sreenivas patents
Krishnan Sreenivas is listed as an inventor on 33 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Krishnan Sreenivas |
| Total patents | 33 |
| First publication | Feb 2, 2016 |
| Latest publication | Feb 5, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Load and store memory architecture
US-2026037457-A1 · Feb 5, 2026 · US
Coordinating processing tasks between one-dimensional processing engines and two-dimensional processing engines
US-2026038079-A1 · Feb 5, 2026 · US
Systems and methods for performing inter-accelerator data transfers
US-2026037480-A1 · Feb 5, 2026 · US
Systems and methods for performing direct memory access data transfers
US-2026037478-A1 · Feb 5, 2026 · US
Multi-protocol IO infrastructure for a flexible storage platform
US-12321296-B2 · Jun 3, 2025 · US
Multi-protocol io infrastructure for a flexible storage platform
US-2024168903-A1 · May 23, 2024 · US
Multi-protocol IO infrastructure for a flexible storage platform
US-11907150-B2 · Feb 20, 2024 · US
Multi-protocol io infrastructure for a flexible storage platform
US-2021263871-A1 · Aug 26, 2021 · US
Multi-protocol IO infrastructure for a flexible storage platform
US-11003609-B2 · May 11, 2021 · US
Recent patents
Latest publications not already listed above.
PCIE lane aggregation over a high speed link
US-10929325-B2 · Feb 23, 2021 · US
Multi-protocol io infrastructure for a flexible storage platform
US-2020379933-A1 · Dec 3, 2020 · US
Multi-protocol I/O infrastructure for a flexible storage platform
US-10776299-B2 · Sep 15, 2020 · US
Mitigating GC effect in a RAID configuration
US-10649667-B2 · May 12, 2020 · US
Pcie lane aggregation over a high speed link
US-2020142852-A1 · May 7, 2020 · US
PCIe lane aggregation over a high speed link
US-10572425-B2 · Feb 25, 2020 · US
Multi-protocol io infrastructure for a flexible storage platform
US-2019286595-A1 · Sep 19, 2019 · US
Multi-protocol io infrastructure for a flexible storage platform
US-10360166-B2 · Jul 23, 2019 · US
Pcie lane aggregation over a high speed link
US-2019171605-A1 · Jun 6, 2019 · US
PCIe lane aggregation over a high speed link
US-10235318-B2 · Mar 19, 2019 · US
Multi-protocol io infrastructure for a flexible storage platform
US-2018329844-A1 · Nov 15, 2018 · US
Multi-protocol IO infrastructure for a flexible storage platform
US-10114778-B2 · Oct 30, 2018 · US
Compression of display data stored locally on a GPU
US-10002586-B1 · Jun 19, 2018 · US
Pcie lane aggregation over a high speed link
US-2018067887-A1 · Mar 8, 2018 · US
Mitigating gc effect in a raid configuration
US-2018011641-A1 · Jan 11, 2018 · US
PCIe lane aggregation over a high speed link
US-9846669-B2 · Dec 19, 2017 · US
Mitigating GC effect in a raid configuration
US-9804787-B2 · Oct 31, 2017 · US
Mitigating gc effect in a raid configuration
US-2017123686-A1 · May 4, 2017 · US
Pcie lane aggregation over a high speed link
US-2016335216-A1 · Nov 17, 2016 · US
Multi-protocol io infrastructure for a flexible storage platform
US-2016328347-A1 · Nov 10, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Samsung Electronics Co Ltd | 16 |
| Inphi Corp | 11 |
| Nvidia Corp | 6 |
| Krishnan Sreenivas | 1 |
| Bennebroek Koen | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F13/4022 | 23 |
| G06F13/4282 | 21 |
| G06F13/1668 | 16 |
| G06F2213/0032 | 12 |
| G06F2213/0028 | 12 |