Multi-protocol IO infrastructure for a flexible storage platform

US11003609B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11003609-B2
Application numberUS-202016994405-A
CountryUS
Kind codeB2
Filing dateAug 14, 2020
Priority dateMay 8, 2015
Publication dateMay 11, 2021
Grant dateMay 11, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.

First claim

Opening claim text (preview).

What is claimed is: 1. A system, comprising: a storage board, comprising: a first storage interface connector for mechanically connecting to a first storage device; and a second storage interface connector for mechanically connecting to a second storage device; a first storage circuit in communication with the storage board, the first storage circuit configured to support a first storage interface for communicating with the first storage device; and a second storage circuit in communication with the storage board, the second storage circuit configured to support a second storage interface for communicating with the second storage device, the first storage interface of the first storage circuit being different from the second storage interface of the second storage circuit, wherein the first storage interface connector comprises a multi-protocol connector that is different from the second storage interface connector. 2. The system of claim 1 , wherein the first storage interface comprises at least one of a Serial Advanced Technology Attachment (SATA) interface or a Serial Attached SCSI (SAS) interface, and the second storage interface comprises a Non Volatile Memory Express (NVMe) interface. 3. The system of claim 1 , wherein the first storage device is compatible with the first storage interface, and the first storage interface connector is configured to mechanically connect to a third storage device compatible with a third storage interface different from the first storage interface. 4. The system of claim 3 , wherein the first storage interface connector is connected to the third storage device in response to the first storage device being physically removed from the first storage interface connector and replaced with the third storage device. 5. The system of claim 4 , wherein the first storage interface is a SATA interface and the third storage interface is a SAS interface. 6. The system of claim 1 , wherein the multi-protocol connector is compatible with at least two from among SATA, SAS, or NVMe over Peripheral Component Interconnect Express (PCIe). 7. A system, comprising: a storage board, comprising: a first storage interface connector for connecting to a first storage device; and a second storage interface connector for connecting to a second storage device; a first storage circuit in communication with the storage board, the first storage circuit configured to support a first storage interface for communicating with the first storage device; and a second storage circuit in communication with the storage board, the second storage circuit configured to support a second storage interface for communicating with the second storage device, the first storage interface of the first storage circuit being different from the second storage interface of the second storage circuit, wherein at least one of the first storage interface connector or the second storage interface connector is a multi-protocol connector configured to support at least two different storage interfaces, and wherein the multi-protocol connector is configured to support a 2-lane protocol and a 4-lane protocol. 8. The system of claim 7 , wherein the multi-protocol connector is configured to use the 2-lane protocol or the 4-lane protocol according to a number of pins used by a storage device connected to the multi-protocol connector. 9. A system, comprising: a storage board, comprising: a first storage interface connector for mechanically connecting to a first storage device; and a second storage interface connector for mechanically connecting to a second storage device; and at least one storage circuit in communication with the storage board, the at least one storage circuit configured to support a first storage interface for communicating with the first storage device, and a second storage interface for communicating with the second storage device, wherein the first storage interface is different from the second storage interface, and wherein the first storage interface connector comprises a multi-protocol connector that is different from the second storage interface connector. 10. The system of claim 9 , wherein the first storage interface connector is configured to use a 2-lane storage interface, and the second storage interface connector is configured to use a 4-lane storage interface. 11. The system of claim 10 , wherein the first storage interface comprises at least one of a Serial Advanced Technology Attachment (SATA) interface or a Serial Attached SCSI (SAS) interface, and the second storage interface comprises a Non Volatile Memory Express (NVMe) interface. 12. The system of claim 11 , wherein the first storage interface is compatible with SATA and SAS. 13. The system of claim 9 , wherein the at least one storage circuit comprises a storage controller configured to detect a third storage interface compatible with a third storage device connected to the multi-protocol connector, and to reconfigure the at least one storage circuit to support the third storage interface in response to the third storage device being connected to the multi-protocol connector, wherein the third storage interface is different from at least one of the first storage interface or the second storage interface. 14. The system of claim 13 , wherein the storage controller is configured to detect the third storage device connected to the multi-protocol connector in response to the first storage device being physically removed from the multi-protocol connector and replaced with the third storage device. 15. The system of claim 9 , wherein the multi-protocol connector is configured to support a 2-lane protocol and a 4-lane protocol. 16. The system of claim 15 , wherein the multi-protocol connector is configured to use the 2-lane protocol or the 4-lane protocol according to a number of pins used by a storage device connected to the multi-protocol connector. 17. The system of claim 16 , wherein the multi-protocol connector is compatible with at least two from among SATA, SAS, or NVMe over Peripheral Component Interconnect Express (PCIe).

Assignees

Inventors

Classifications

  • Serial ATA [SATA] · CPC title

  • Serial attached SCSI [SAS] · CPC title

  • PCI express · CPC title

  • Device-to-bus coupling · CPC title

  • G06F13/387Primary

    for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system · CPC title

Patent family

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Frequently asked questions

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What does patent US11003609B2 cover?
A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit ma…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F13/387. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 11 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).