Multi-protocol IO infrastructure for a flexible storage platform

Patent metadata

Field	Value
Publication number	US-10114778-B2
Application number	US-201615090409-A
Country	US
Kind code	B2
Filing date	Apr 4, 2016
Priority date	May 8, 2015
Publication date	Oct 30, 2018
Grant date	Oct 30, 2018

Abstract

A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.

First claim

What is claimed is:

1. A storage system, comprising:
a storage motherboard, comprising:
a first plurality of storage interface connectors;
a cable connector; and
a storage adapter circuit having a host side interface connected to the cable connector and a first plurality of storage side interfaces, each connected to a respective storage interface connector of the storage interface connectors, the storage adapter circuit comprising:
a first protocol translator, configured to translate communications from a host interface protocol to a first storage interface protocol;
a second protocol translator, configured to translate communications from a host interface protocol to a second storage interface protocol;
a first consolidation device configured to connect the first protocol translator to a plurality of storage devices configured to use the first storage interface protocol;
a second consolidation device configured to connect the second protocol translator to a plurality of storage devices configured to use the second storage interface protocol; and
a storage adapter circuit controller configured to:
detect a protocol of a mass storage device connected to a connector of the first plurality of storage interface connectors,
connect the first protocol translator to the host side interface, and connect the first consolidation device between the first protocol translator and the first plurality of storage side interfaces, when the detected protocol is the first protocol, and
connect the second protocol translator to the host side interface, and connect the second consolidation device between the second protocol translator and the first plurality of storage side interfaces, when the detected protocol is the second protocol.

2. The system of claim 1 , wherein:
the first protocol translator is a PCIe host bus adapter for SAS, and
the first consolidation device is a SAS expander.

3. The system of claim 2 , wherein:
the second protocol translator is a PCIe host bus adapter for SATA, and
the second consolidation device is a SATA expander.

4. The system of claim 1 , further comprising a third consolidation device configured to connect to a plurality of storage devices configured to use the host interface protocol,
wherein the storage adapter circuit controller is further configured to connect the third consolidation device to the host side interface, when the detected protocol is the host interface protocol.

5. The system of claim 4 , wherein the host interface protocol is PCIe.

6. The system of claim 4 , wherein the host interface protocol is Ethernet.

7. The system of claim 1 , wherein:
the first protocol translator is a PCIe host bus adapter for SAS, and
the first consolidation device is a SAS expander.

8. The system of claim 7 , wherein:
the second protocol translator is a PCIe host bus adapter for SATA, and
the second consolidation device is a SATA expander.

9. The system of claim 1 , wherein the first consolidation device comprises a routing circuit.

10. The system of claim 1 , wherein the first storage interface protocol is selected from the group consisting of SATA, SAS, FibreChannel, NVMe, Ethernet, and USB.

11. The system of claim 1 , wherein a connector of the first plurality of storage interface connectors is compatible with at least two different storage interfaces.

12. The system of claim 1 , wherein a connector of the first plurality of storage interface connectors comprises an SFF8639 connector.

13. The system of claim 1 , further comprising a mass storage device connected to a storage connector of the first plurality of storage interface connectors by a data path comprising a portion selected from the group consisting of a cable, a plurality of printed circuit board traces, and a wireless link.

14. The system of claim 1 , wherein the cable connector comprises a PCIe connector, and the host interface protocol is PCIe.

15. A computing system, comprising:
a rack tray for a 19-inch rack, the rack tray comprising:
a host motherboard comprising a CPU and memory, and
a storage motherboard according to claim 1 .

Assignees

• Samsung Electronics Co Ltd

Inventors

• WORLEY Fred
• Rogers Harry
• Krishnan Sreenivas
• Ping Zhan
• Scriber Michael

Classifications

• G06F13/385 Primary

  for adaptation of a particular data processing system to different peripheral devices · CPC title

• G06F13/4282

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F13/1668 Primary

  Details of memory controller · CPC title

• G06F3/0655

  Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices · CPC title