Dynamic address-based data reliability
US-2026064276-A1 · Mar 5, 2026 · US
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Jeter Robert E patents
Jeter Robert E is listed as an inventor on 66 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Jeter Robert E |
| Total patents | 66 |
| First publication | Jan 12, 2016 |
| Latest publication | Mar 5, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Memory calibration with reduced calibration parameters
US-12542189-B1 · Feb 3, 2026 · US
Memory Calibration and Margin Check
US-2026023491-A1 · Jan 22, 2026 · US
Voltage ramp memory calibration
US-12444474-B2 · Oct 14, 2025 · US
Concurrent write data strobe and reference voltage calibrations
US-12423009-B2 · Sep 23, 2025 · US
Memory calibration and margin check
US-12399634-B2 · Aug 26, 2025 · US
Memory calibration in limited power scenario
US-12326768-B1 · Jun 10, 2025 · US
Memory subsystem calibration using substitute results
US-12293808-B2 · May 6, 2025 · US
Voltage Ramp Memory Calibration
US-2025104790-A1 · Mar 27, 2025 · US
Memory Calibration and Margin Check
US-2024295976-A1 · Sep 5, 2024 · US
Recent patents
Latest publications not already listed above.
Concurrent Write Data Strobe and Reference Voltage Calibrations
US-2024211151-A1 · Jun 27, 2024 · US
Memory calibration and margin check
US-12014060-B2 · Jun 18, 2024 · US
Nominal distance reference voltage calibration
US-11960739-B1 · Apr 16, 2024 · US
Memory Calibration and Margin Check
US-2024078029-A1 · Mar 7, 2024 · US
Memory Subsystem Calibration Using Substitute Results
US-2024062792-A1 · Feb 22, 2024 · US
Memory channels calibration during boot wherein channels are calibrated in parallel based on identifer
US-11875871-B2 · Jan 16, 2024 · US
Memory subsystem calibration using substitute results
US-11776597-B2 · Oct 3, 2023 · US
Memory Calibration During Boot
US-2023115215-A1 · Apr 13, 2023 · US
Memory channels calibration during boot wherein channels are calibrated in parallel based on identifers
US-11527269-B2 · Dec 13, 2022 · US
Selective reference voltage calibration in memory subsystem
US-11501820-B2 · Nov 15, 2022 · US
Selective Reference Voltage Calibration in Memory Subsystem
US-2022270664-A1 · Aug 25, 2022 · US
Memory Subsystem Calibration Using Substitute Results
US-2022189519-A1 · Jun 16, 2022 · US
Filtering memory calibration
US-11226752-B2 · Jan 18, 2022 · US
Memory subsystem calibration using substitute results
US-11217285-B1 · Jan 4, 2022 · US
Memory Calibration During Boot
US-2021183414-A1 · Jun 17, 2021 · US
Memory calibration with end point replay
US-10991403-B2 · Apr 27, 2021 · US
System for managing memory devices
US-10877688-B2 · Dec 29, 2020 · US
Filtering memory calibration
US-2020285406-A1 · Sep 10, 2020 · US
Duty Cycle Correction with Read and Write Calibration
US-2020266810-A1 · Aug 20, 2020 · US
Memory Calibration with End Point Replay
US-2020265881-A1 · Aug 20, 2020 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Apple Inc | 67 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G11C29/028 | 36 |
| G11C2207/2254 | 36 |
| G11C29/023 | 27 |
| G06F3/0673 | 23 |
| G06F13/1689 | 18 |