Flexible compression header and code generation
US-12074618-B2 · Aug 27, 2024 · US
This page is not indexed by search engines while we improve data quality.
Cutter Daniel patents
Cutter Daniel is listed as an inventor on 26 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Cutter Daniel |
| Total patents | 26 |
| First publication | Mar 19, 2015 |
| Latest publication | Aug 27, 2024 |
Notable patents
Publications ranked by popularity score, then publication date.
Method and apparatus for efficient deflate decompression using content-addressable data structures
US-12021551-B2 · Jun 25, 2024 · US
Apparatus and method for two-stage lossless data compression, and two-stage lossless data decompression
US-11955995-B2 · Apr 9, 2024 · US
Flexible compression header and code generation
US-2022200626-A1 · Jun 23, 2022 · US
Method and apparatus for efficient deflate decompression using content-addressable data structures
US-2022200623-A1 · Jun 23, 2022 · US
Supporting random access of compressed data
US-11243836-B2 · Feb 8, 2022 · US
Method and apparatus for high performance compression and decompression
US-11095305-B1 · Aug 17, 2021 · US
Supporting random access of compressed data
US-2020319959-A1 · Oct 8, 2020 · US
Supporting random access of compressed data
US-10691529-B2 · Jun 23, 2020 · US
Optimized selection of hash collision chains
US-10528539-B2 · Jan 7, 2020 · US
Recent patents
Latest publications not already listed above.
Accelerator apparatus and method for decoding and de-serializing bit-packed data
US-2020004535-A1 · Jan 2, 2020 · US
Supporting random access of compressed data
US-2019391869-A1 · Dec 26, 2019 · US
Method and apparatus for high performance compression and decompression
US-10270464-B1 · Apr 23, 2019 · US
Technologies for structured database query for finding unique element values
US-2019042611-A1 · Feb 7, 2019 · US
Technologies for structured database query
US-2019034490-A1 · Jan 31, 2019 · US
Optimized selection of hash collision chains
US-2018004744-A1 · Jan 4, 2018 · US
Memory mapping in a processor having multiple programmable units
US-9830284-B2 · Nov 28, 2017 · US
Memory mapping in a processor having multiple programmable units
US-9830285-B2 · Nov 28, 2017 · US
Memory mapping in a processor having multiple programmable units
US-9824037-B2 · Nov 21, 2017 · US
Memory mapping in a processor having multiple programmable units
US-9824038-B2 · Nov 21, 2017 · US
Memory mapping in a processor having multiple programmable units
US-2016070664-A1 · Mar 10, 2016 · US
Memory mapping in a processor having multiple programmable units
US-2016071558-A1 · Mar 10, 2016 · US
Memory mapping in a processor having multiple programmable units
US-2016034420-A1 · Feb 4, 2016 · US
Memory mapping in a processor having multiple programmable units
US-2016019178-A1 · Jan 21, 2016 · US
Memory mapping in a processor having multiple programmable units
US-9128818-B2 · Sep 8, 2015 · US
Memory mapping in a processor having multiple programmable units
US-2015081999-A1 · Mar 19, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 26 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F12/06 | 12 |
| H03M7/3086 | 10 |
| H03M7/40 | 10 |
| G06F12/109 | 10 |
| G06F12/0806 | 10 |