Integrated circuit generation with improved interconnect
US-12591527-B2 · Mar 31, 2026 · US
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Cook Henry patents
Cook Henry is listed as an inventor on 40 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Cook Henry |
| Total patents | 40 |
| First publication | Feb 6, 2020 |
| Latest publication | Mar 31, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Cache coherency state request vector encoding and use thereof
US-12493551-B2 · Dec 9, 2025 · US
Integrated Circuit Design Verification with Object Model
US-2025225302-A1 · Jul 10, 2025 · US
Speculative request indicator in request message
US-12332799-B2 · Jun 17, 2025 · US
Address boundary functions for physical and localized addresses
US-2025190358-A1 · Jun 12, 2025 · US
Orderability of operations
US-2025173281-A1 · May 29, 2025 · US
Orderability of operations
US-12306772-B2 · May 20, 2025 · US
Address boundary functions for physical and localized addresses
US-12248405-B2 · Mar 11, 2025 · US
Integrated circuit generation with composable interconnect
US-2024338505-A1 · Oct 10, 2024 · US
Integrated circuit generation with improved interconnect
US-2024338329-A1 · Oct 10, 2024 · US
Recent patents
Latest publications not already listed above.
Method for executing atomic memory operations when contested
US-12066941-B2 · Aug 20, 2024 · US
Address boundary functions for physical and localized addresses
US-2024256462-A1 · Aug 1, 2024 · US
Integrated circuit generator using a provider
US-2024211665-A1 · Jun 27, 2024 · US
Orderability of Operations
US-2024184721-A1 · Jun 6, 2024 · US
Speculative Request Indicator in Request Message
US-2024184703-A1 · Jun 6, 2024 · US
Cache Coherency State Request Vector Encoding and Use Thereof
US-2024184698-A1 · Jun 6, 2024 · US
Integrated circuits as a service
US-11922101-B2 · Mar 5, 2024 · US
Integrated circuits as a service
US-2023237217-A1 · Jul 27, 2023 · US
Data cache with hybrid writeback and writethrough
US-11687455-B2 · Jun 27, 2023 · US
Point-to-point module connection interface for integrated circuit generation
US-11675959-B2 · Jun 13, 2023 · US
Reset crossing and clock crossing interface for integrated circuit generation
US-11675945-B2 · Jun 13, 2023 · US
Integrated circuits as a service
US-11610036-B2 · Mar 21, 2023 · US
Method for executing atomic memory operations when contested
US-2023033550-A1 · Feb 2, 2023 · US
Data cache with hybrid writeback and writethrough
US-2023029660-A1 · Feb 2, 2023 · US
Method for executing atomic memory operations when contested
US-11467962-B2 · Oct 11, 2022 · US
Data cache with hybrid writeback and writethrough
US-11467961-B2 · Oct 11, 2022 · US
Reset crossing and clock crossing interface for integrated circuit generation
US-2022261522-A1 · Aug 18, 2022 · US
Reset crossing and clock crossing interface for integrated circuit generation
US-11321511-B2 · May 3, 2022 · US
Method for executing atomic memory operations when contested
US-2022066936-A1 · Mar 3, 2022 · US
Point-to-point module connection interface for integrated circuit generation
US-2022035987-A1 · Feb 3, 2022 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Sifive Inc | 40 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F30/32 | 12 |
| G06F2115/02 | 12 |
| G06F2115/08 | 11 |
| G06F30/398 | 10 |
| G06F30/331 | 10 |