Forming iii nitride alloys
US-2020402791-A1 · Dec 24, 2020 · US
characterised by treatments performed before or after the formation of the materials
characterised by treatments performed before or after the formation of the materials · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10P14/65 |
| Official title | {characterised by treatments performed before or after the formation of the materials} |
| Display label | characterised by treatments performed before or after the formation of the materials |
| Total patents | 90 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is declining.
| Year | Patents |
|---|---|
| 2015 | 10 |
| 2016 | 15 |
| 2017 | 5 |
| 2018 | 8 |
| 2019 | 13 |
| 2020 | 14 |
| 2021 | 6 |
| 2022 | 4 |
| 2023 | 5 |
| 2024 | 6 |
| 2025 | 4 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Insulator semiconductor device-structure
US-10832920-B2 · Nov 10, 2020 · US
Etching back method
US-2020273714-A1 · Aug 27, 2020 · US
Vertical fin type bipolar junction transistor (BJT) device with a self-aligned base contact
US-10658495-B2 · May 19, 2020 · US
Integrated semiconductor processing
US-2020152493-A1 · May 14, 2020 · US
Preparing method of monomolecular nano-thin film
US-2020122190-A1 · Apr 23, 2020 · US
Vertical fin type bipolar junction transistor (bjt) device with a self-aligned base contact
US-2020119170-A1 · Apr 16, 2020 · US
Methods of manufacturing semiconductor devices
US-2020111660-A1 · Apr 9, 2020 · US
Method of manufacturing semiconductor device
US-2020098561-A1 · Mar 26, 2020 · US
Reducing EUV-induced material property changes
US-10510538-B2 · Dec 17, 2019 · US
Method of fabrication of a semiconductor element comprising a highly resistive substrate
US-10510531-B2 · Dec 17, 2019 · US
Methods and structures for forming a tight pitch structure
US-10424482-B2 · Sep 24, 2019 · US
Mechanism for FinFET Well Doping
US-2019273014-A1 · Sep 5, 2019 · US
Method for manufacturing substrate
US-10392297-B2 · Aug 27, 2019 · US
Methods and structures for forming a tight pitch structure
US-2019189443-A1 · Jun 20, 2019 · US
Insulator semiconductor device-structure
US-2019172721-A1 · Jun 6, 2019 · US
Method for fabricating semiconductor device
US-10312146-B2 · Jun 4, 2019 · US
Mechanism for FinFET well doping
US-10297492-B2 · May 21, 2019 · US
Method for preventing excessive etching of edges of an insulator layer
US-10249508-B2 · Apr 2, 2019 · US
Multilayer dielectric structures with graded composition for nano-scale semiconductor devices
US-10211047-B2 · Feb 19, 2019 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10P14/65?
- CPC H10P14/65 is the Cooperative Patent Classification code for “characterised by treatments performed before or after the formation of the materials.”
- How many patents are filed under CPC H10P14/65 (characterised by treatments performed before or after the formation of the materials)?
- Our database includes 90 publications tagged with this CPC code.
- Is patent activity under CPC H10P14/65 growing?
- Publication counts under this code: 6 in 2024 vs 4 in 2025 (latest complete years).