Internal spacer formation from selective oxidation for fin-first wire-last replacement gate-all-around nanowire fet
US-2017005180-A1 · Jan 5, 2017 · US
US10424482B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10424482-B2 |
| Application number | US-201715846779-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 19, 2017 |
| Priority date | Dec 19, 2017 |
| Publication date | Sep 24, 2019 |
| Grant date | Sep 24, 2019 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A method for manufacturing a semiconductor device includes forming a plurality of amorphous silicon germanium (a-SiGe) structures having a first percentage of germanium on a substrate, forming a plurality of spacers on sides of the plurality of a-SiGe structures, performing an annealing to convert a portion of each of the a-SiGe structures into respective portions comprising a-SiGe having a second percentage of germanium higher than the first percentage of germanium, and to convert each of the spacers into respective silicon oxide portions, removing from the substrate at least one of: one or more unconverted portions of the a-SiGe structures having the first percentage of germanium, one or more of the converted portions of a-SiGe structures, and one or more of the silicon oxide portions, and transferring a pattern to the substrate to form a plurality of patterned substrate portions, wherein the pattern includes the portions remaining after the removing.
Opening claim text (preview).
We claim: 1. A method for manufacturing a semiconductor device, comprising: forming a plurality of mandrels on a substrate, wherein the plurality of mandrels comprise silicon germanium (SiGe) having a first percentage of germanium; forming a plurality of dielectric portions on the substrate on sides of the plurality of mandrels; performing an annealing to convert a portion of each of the plurality of mandrels into respective portions comprising SiGe having a second percentage of germanium higher than the first percentage of germanium, and to convert at least a portion of each of the plurality of dielectric portions into respective silicon oxide portions; removing from the substrate at least one of: one or more unconverted portions of the plurality of mandrels comprising SiGe having the first percentage of germanium; one or more of the converted portions of the plurality of mandrels comprising SiGe having the second percentage of germanium; and one or more of the silicon oxide portions; and transferring a pattern to the substrate to form a plurality of patterned substrate portions, wherein the pattern includes at least one of the unconverted portions of the plurality of mandrels, the converted portions of the plurality of mandrels, and the silicon oxide portions remaining after the removing; wherein removing one or more of the converted portions of the plurality of mandrels comprises selectively removing each of the converted portions of the plurality of mandrels from the substrate with respect to the unconverted portions of the plurality of mandrels and the silicon oxide portions. 2. The method according to claim 1 , wherein the plurality of dielectric portions comprise germanium dioxide (GeO 2 ). 3. The method according to claim 1 , wherein the annealing is performed at a temperature of 400° C.-700° C. 4. The method according to claim 1 , wherein the annealing is performed in a nitrogen (N 2 ) ambient at less than 500° C. 5. The method according to claim 1 , further comprising forming a mask on the substrate, wherein the mask leaves exposed at least one of one or more of the unconverted portions of the plurality of mandrels and one or more of the silicon oxide portions. 6. The method according to claim 5 , wherein removing one or more of the unconverted portions of the plurality of mandrels comprises removing the one or more of the unconverted portions of the plurality of mandrels left exposed by the mask. 7. The method according to claim 5 , wherein removing one or more of the silicon oxide portions comprises removing the one or more of the silicon oxide portions left exposed by the mask. 8. The method according to claim 1 , further comprising depositing a mandrel material on the substrate prior to the annealing, wherein the mandrel material fills in vacant areas between adjacent mandrels of the plurality of mandrels. 9. The method according to claim 1 , wherein the plurality of dielectric portions comprise a plurality of spacers formed on the sides of the plurality of mandrels. 10. The method according to claim 1 , wherein the plurality of dielectric portions are part of a dielectric layer formed on the substrate and on top surfaces of the plurality of mandrels. 11. The method according to claim 10 , wherein the annealing converts a portion of the dielectric layer formed on the top surfaces of the plurality of mandrels into additional silicon oxide portions. 12. A method for manufacturing a semiconductor device, comprising: forming a plurality of mandrels on a substrate, wherein the plurality of mandrels comprise silicon germanium (SiGe) having a first percentage of germanium; forming a plurality of dielectric portions on the substrate on sides of the plurality of mandrels; performing an annealing to convert a portion of each of the plurality of mandrels into respective portions comprising SiGe having a second percentage of germanium higher than the first percentage of germanium, and to convert at least a portion of each of the plurality of dielectric portions into respective silicon oxide portions; removing from the substrate at least one of: one or more unconverted portions of the plurality of mandrels comprising SiGe having the first percentage of germanium; one or more of the converted portions of the plurality of mandrels comprising SiGe having the second percentage of germanium; and one or more of the silicon oxide portions; and transferring a pattern to the substrate to form a plurality of patterned substrate portions, wherein the pattern includes at least one of the unconverted portions of the plurality of mandrels, the converted portions of the plurality of mandrels, and the silicon oxide portions remaining after the removing; wherein each of the unconverted portions of the plurality of mandrels and each of the silicon oxide portions are removed from the substrate so that the plurality of patterned substrate portions correspond to the converted portions of the plurality of mandrels remaining after the removing and not to the unconverted portions of the plurality of mandrels and the silicon oxide portions. 13. A method for manufacturing a semiconductor device, comprising: forming a plurality of mandrels on a substrate, wherein the plurality of mandrels comprise silicon germanium (SiGe) having a first percentage of germanium; forming a plurality of dielectric portions on the substrate on sides of the plurality of mandrels; performing an annealing to convert a portion of each of the plurality of mandrels into respective portions comprising SiGe having a second percentage of germanium higher than the first percentage of germanium, and to convert at least a portion of each of the plurality of dielectric portions into respective silicon oxide portions; removing from the substrate at least one of: one or more unconverted portions of the plurality of mandrels comprising SiGe having the first percentage of germanium; one or more of the converted portions of the plurality of mandrels comprising SiGe having the second percentage of germanium; and one or more of the silicon oxide portions; and transferring a pattern to the substrate to form a plurality of patterned substrate portions, wherein the pattern includes at least one of the unconverted portions of the plurality of mandrels, the converted portions of the plurality of mandrels, and the silicon oxide portions remaining after the removing; wherein each of the unconverted portions of the plurality of mandrels and each of the converted portions of the plurality of mandrels are removed from the substrate so that the plurality of patterned substrate portions correspond to the silicon oxide portions remaining after the removing and not to the unconverted and converted portions of the plurality of mandrels. 14. A method for manufacturing a semiconductor device, comprising: forming a plurality of mandrels on a substrate, wherein the plurality of mandrels comprise silicon germanium (SiGe) having a first percentage of germanium; forming a plurality of dielectric portions on the substrate on sides of the plurality of mandrels; performing an annealing to convert a portion of each of the plurality of mandrels into respective portions comprising SiGe having a second percentage of germanium higher than the first percentage of germanium, and to convert at least a portion of each of the plurality of dielectric portions into respective silicon oxide portions; removing from the substrate at least one of: one or more unconverted portions of the plurality of mandrels comprising SiGe having the first percentage of germanium; one or more of the converted portions of t
Process specially adapted to improve the resolution of the mask · CPC title
characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title
characterised by their composition, e.g. multilayer masks or materials · CPC title
using masks for insulating materials · CPC title
by introduction of substances into an already-existing insulating layer · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.