Memory devices programmed with dielectric structures and methods for manufacturing the same
US-2026059745-A1 · Feb 26, 2026 · US
Gate dielectric programmed, e.g. different thickness
Gate dielectric programmed, e.g. different thickness · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10B20/367 |
| Official title | {Gate dielectric programmed, e.g. different thickness} |
| Display label | Gate dielectric programmed, e.g. different thickness |
| Total patents | 51 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is rapidly declining.
| Year | Patents |
|---|---|
| 2015 | 3 |
| 2016 | 3 |
| 2017 | 7 |
| 2018 | 7 |
| 2019 | 5 |
| 2020 | 6 |
| 2021 | 6 |
| 2022 | 3 |
| 2023 | 3 |
| 2024 | 4 |
| 2025 | 2 |
| 2026 | 2 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
High-Isolation P-Substrate on RF PMOS
US-2026047086-A1 · Feb 12, 2026 · US
Semiconductor memory devices with different doping types
US-2025169142-A1 · May 22, 2025 · US
Semiconductor memory devices with different doping types
US-12230681-B2 · Feb 18, 2025 · US
Read only memory
US-12063775-B2 · Aug 13, 2024 · US
Semiconductor memory devices with different doping types
US-2024090210-A1 · Mar 14, 2024 · US
Semiconductor device and method of controlling the same
US-11925025-B2 · Mar 5, 2024 · US
Read only memory
US-2024040781-A1 · Feb 1, 2024 · US
Semiconductor memory devices with different doping types
US-11856761-B2 · Dec 26, 2023 · US
Read only memory
US-11818883-B2 · Nov 14, 2023 · US
Programmable read-only memory
US-2023301074-A1 · Sep 21, 2023 · US
Semiconductor memory devices with different doping types
US-2022359546-A1 · Nov 10, 2022 · US
Read only memory
US-2022199632-A1 · Jun 23, 2022 · US
Integrated circuit including at least one memory cell with an antifuse device
US-11322503-B2 · May 3, 2022 · US
Power Device with Low Gate Charge and Low Figure of Merit
US-2021193826-A1 · Jun 24, 2021 · US
Semiconductor device and method of controlling the same
US-2021143168-A1 · May 13, 2021 · US
Integrated circuit including at least one memory cell with an antifuse device
US-2021126000-A1 · Apr 29, 2021 · US
Power device with low gate charge and low figure of merit
US-10957791-B2 · Mar 23, 2021 · US
Integrated circuit including at least one memory cell with an antifuse device
US-10923484-B2 · Feb 16, 2021 · US
Stacked FinFET mask-programmable read only memory containing spaced apart upper and lower threshold voltage setting layers
US-10916552-B2 · Feb 9, 2021 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10B20/367?
- CPC H10B20/367 is the Cooperative Patent Classification code for “Gate dielectric programmed, e.g. different thickness.”
- How many patents are filed under CPC H10B20/367 (Gate dielectric programmed, e.g. different thickness)?
- Our database includes 51 publications tagged with this CPC code.
- Is patent activity under CPC H10B20/367 growing?
- Publication counts under this code: 4 in 2024 vs 2 in 2025 (latest complete years).