Task processor
US-2017351541-A1 · Dec 7, 2017 · US
with multiple register sets
with multiple register sets · Cooperative Patent Classification (CPC)
Computing, optics, measurement, and control technologies.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | G06F9/462 |
| Official title | {with multiple register sets} |
| Display label | with multiple register sets |
| Total patents | 186 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is declining.
| Year | Patents |
|---|---|
| 2015 | 14 |
| 2016 | 28 |
| 2017 | 23 |
| 2018 | 15 |
| 2019 | 27 |
| 2020 | 22 |
| 2021 | 20 |
| 2022 | 6 |
| 2023 | 9 |
| 2024 | 11 |
| 2025 | 10 |
| 2026 | 1 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Processor and program execution method capable of efficient program execution
US-9823946-B2 · Nov 21, 2017 · US
Apparatus with at least one resource having thread mode and transaction mode, and method
US-2017329626-A1 · Nov 16, 2017 · US
Operand size control
US-9804851-B2 · Oct 31, 2017 · US
Task processor
US-9766924-B2 · Sep 19, 2017 · US
System for selecting a task to be executed according to an output from a task control circuit
US-9753729-B2 · Sep 5, 2017 · US
Method for implementing a line speed interconnect structure
US-9740499-B2 · Aug 22, 2017 · US
Processor and controlling method thereof
US-2017161217-A1 · Jun 8, 2017 · US
Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer
US-2017139714-A1 · May 18, 2017 · US
Managing a free list of resources to decrease control complexity and reduce power consumption
US-9645637-B2 · May 9, 2017 · US
Programmable CPU register hardware context swap mechanism
US-9619231-B2 · Apr 11, 2017 · US
Managing a free list of resources to decrease control complexity and reduce power consumption
US-2017068576-A1 · Mar 9, 2017 · US
Managing a free list of resources to decrease control complexity and reduce power consumption
US-2017068306-A1 · Mar 9, 2017 · US
Computer systems and methods with resource transfer hint instruction
US-9582320-B2 · Feb 28, 2017 · US
REGISTER SPILL MANAGEMENT FOR GENERAL PURPOSE REGISTERS (GPRs)
US-2017053374-A1 · Feb 23, 2017 · US
Efficient register preservation on processors
US-9575666-B2 · Feb 21, 2017 · US
Computing device, process control method, and computer-readable recording medium
US-2017038998-A1 · Feb 9, 2017 · US
Maintaining secure data isolated from non-secure access when switching between domains
US-2017024557-A1 · Jan 26, 2017 · US
Parallel caching architecture and methods for block-based data processing
US-2016357668-A1 · Dec 8, 2016 · US
Method of detecting stack overflows and processor for implementing such a method
US-9513911-B2 · Dec 6, 2016 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC G06F9/462?
- CPC G06F9/462 is the Cooperative Patent Classification code for “with multiple register sets.”
- How many patents are filed under CPC G06F9/462 (with multiple register sets)?
- Our database includes 186 publications tagged with this CPC code.
- Is patent activity under CPC G06F9/462 growing?
- Publication counts under this code: 11 in 2024 vs 10 in 2025 (latest complete years).