Efficient register preservation on processors

Patent metadata

Field	Value
Publication number	US-9575666-B2
Application number	US-201514824298-A
Country	US
Kind code	B2
Filing date	Aug 12, 2015
Priority date	Feb 23, 2015
Publication date	Feb 21, 2017
Grant date	Feb 21, 2017

Abstract

In an approach for locating, preserving, and receiving registers, a register located within a central processing unit is modified a preservation bit, wherein the preservation bit designates when the register is to be preserved. The preservation bit of the register is activated. A preservation bit requests a subroutine to access content held on the register. A register is pushed to a memory source. The bitmask is pushed to a memory source, wherein the bitmask contains information regarding the content pushed to the memory source. The bitmask is popped, at the request of the subroutine, to determine that that content is to be popped. The content is popped from the memory source to the register. The content is returned from the subroutine.

First claim

What is claimed is:

1. A method for locating, preserving, and receiving registers, the method comprising:
modifying a register located within a central processing unit with a preservation bit, wherein the preservation bit designates when the register is to be preserved;
activating the preservation bit of the register;
requesting a subroutine to access content held in the register;
pushing the content to a memory source;
pushing a bitmask to the memory source, wherein the bitmask contains information regarding the content pushed to the memory source;
popping the bitmask, at the request of the subroutine, to determine that that content is to be popped;
popping the content from the memory source to the register; and
returning from the subroutine.

2. The method of claim 1 , wherein the step of returning from the subroutine occurs subsequent to the step of popping the content from the memory source to the register.

3. The method of claim 1 , further comprising:
implementing security to protect the register from being improperly modified upon activating the preservation bit of the register.

4. The method of claim 1 , further comprising:
determining that a function caller and a function callee have identified the register must be preserved, wherein the function caller and the function callee are elements of an interface within the subroutine.

5. The method of claim 4 , wherein the function caller and the function callee identify the register must be preserved by recognizing an active preservation bit of the register.

6. The method of claim 1 , wherein pushing the content to the memory source comprises:
pushing the content to the memory source in a read-only format.

7. The method of claim 1 , wherein the information regarding the content pushed to the memory source comprises, at least, activation state of the preservation bit, additional previously preserved registers, and locations of the additional previously preserved registers.

Assignees

• IBM

Inventors

• Bester Karla
• Chandler Allan T
• Shewell Mark A
• Yates Stephen J

Classifications

• G06F3/064

  Management of blocks · CPC title

• G06F9/30134

  Register stacks; shift registers · CPC title

• G06F3/0608

  Saving storage space on storage systems · CPC title

• G06F9/462

  with multiple register sets · CPC title

• G06F3/0611 Primary

  in relation to response time · CPC title