Processing vectorized guest physical address translation instructions
US-10877788-B2 · Dec 29, 2020 · US
Extension of operand address space
Extension of operand address space · Cooperative Patent Classification (CPC)
Computing, optics, measurement, and control technologies.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | G06F9/342 |
| Official title | {Extension of operand address space} |
| Display label | Extension of operand address space |
| Total patents | 97 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is stable.
| Year | Patents |
|---|---|
| 2015 | 13 |
| 2016 | 11 |
| 2017 | 10 |
| 2018 | 8 |
| 2019 | 15 |
| 2020 | 8 |
| 2021 | 7 |
| 2022 | 8 |
| 2023 | 5 |
| 2024 | 4 |
| 2025 | 6 |
| 2026 | 2 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Managing the capture of information in applications with prefix instructions
US-10877759-B2 · Dec 29, 2020 · US
Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer
US-10585670-B2 · Mar 10, 2020 · US
Transfer triggered microcontroller with orthogonal instruction set
US-10514922-B1 · Dec 24, 2019 · US
Register partition and protection for virtualized processing device
US-10509666-B2 · Dec 17, 2019 · US
Implementing per-thread memory access permissions
US-10496555-B2 · Dec 3, 2019 · US
Memory address translation
US-10489304-B2 · Nov 26, 2019 · US
Static Identifications in Object-based Memory Access
US-2019339974-A1 · Nov 7, 2019 · US
Exception handling for applications with prefix instructions
US-10394569-B2 · Aug 27, 2019 · US
Exception handling for applications with prefix instructions
US-10394568-B2 · Aug 27, 2019 · US
Executing short pointer mode applications
US-2019220281-A1 · Jul 18, 2019 · US
Discovering high-level language data structures from assembler code
US-10353675-B2 · Jul 16, 2019 · US
Processing vectorized guest physical address translation instructions
US-2019205149-A1 · Jul 4, 2019 · US
Microcontroller with variable length move instructions using direct immediate addressing or indirect register offset addressing
US-10255073-B2 · Apr 9, 2019 · US
Executing short pointer mode applications
US-10248423-B2 · Apr 2, 2019 · US
Discovering high-level language data structures from assembler code
US-10223085-B2 · Mar 5, 2019 · US
Memory address translation
US-2019018789-A1 · Jan 17, 2019 · US
Register partition and protection for virtualized processing device
US-2019004840-A1 · Jan 3, 2019 · US
Implementing per-thread memory access permissions
US-2018329835-A1 · Nov 15, 2018 · US
Discovering high-level language data structures from assembler code
US-2018314501-A1 · Nov 1, 2018 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC G06F9/342?
- CPC G06F9/342 is the Cooperative Patent Classification code for “Extension of operand address space.”
- How many patents are filed under CPC G06F9/342 (Extension of operand address space)?
- Our database includes 97 publications tagged with this CPC code.
- Is patent activity under CPC G06F9/342 growing?
- Publication counts under this code: 4 in 2024 vs 6 in 2025 (latest complete years).