Executing short pointer mode applications

US10248423B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10248423-B2
Application numberUS-201615216867-A
CountryUS
Kind codeB2
Filing dateJul 22, 2016
Priority dateJul 22, 2016
Publication dateApr 2, 2019
Grant dateApr 2, 2019

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A short pointer mode application is loaded in an address space configured for use by a plurality of types of applications including the short pointer mode application and a long pointer mode application. The address space has a first portion addressable by short pointers of a defined size and a second portion addressable by long pointers of another defined size. The other defined size is different from the defined size. Based on executing the short pointer mode application, one or more short pointers of the short pointer mode application are converted to one or more long pointers; and the one or more long pointers are used to access memory within the first portion of the address space addressable by short pointers.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-implemented method of facilitating processing in a computing environment, said computer-implemented method comprising: executing a short pointer mode application loaded in an address space configured for use by a plurality of types of applications including the short pointer mode application and a long pointer mode application, the address space having a first portion addressable by short pointers of a defined size and a second portion addressable by long pointers of another defined size, the other defined size being different from the defined size; and based on executing the short pointer mode application: converting one or more short pointers of the short pointer mode application to one or more long pointers; based on using a long format service function, passing an in-memory short pointer as a parameter in a long format to use the long format service function, wherein the passing includes loading or accessing a long pointer representation in a parameter list holding an image of a long form register representation of the parameter; and using the one or more long pointers to access memory within the first portion of the address space addressable by short pointers. 2. The computer-implemented method of claim 1 , wherein the converting a short pointer to a long pointer includes zero extending the short pointer. 3. The computer-implemented method of claim 1 , further comprising configuring the address space for use by the plurality of types of applications, the configuring defining a first range of addresses for the first portion of the address space and a second range of addresses for the second portion of the address space. 4. The computer-implemented method of claim 3 , wherein the configuring further comprises providing a shadow copy of the first portion of the address space to protect against a wrap around of addresses. 5. The computer-implemented method of claim 1 , further comprising loading the short pointer mode application in the first portion of the address space. 6. The computer-implemented method of claim 1 , further comprising: obtaining an application to be executed; determining the application is the short pointer mode application; and loading the short pointer mode application in the first portion of the address space, based on determining the application is the short pointer mode application. 7. A computer system for facilitating processing in a computing environment, said computer system comprising: a memory; and a processor in communication with the memory, wherein the computer system is configured to perform a method, said method comprising: executing a short pointer mode application loaded in an address space configured for use by a plurality of types of applications including the short pointer mode application and a long pointer mode application, the address space having a first portion addressable by short pointers of a defined size and a second portion addressable by long pointers of another defined size, the other defined size being different from the defined size; and based on executing the short pointer mode application: converting one or more short pointers of the short pointer mode application to one or more long pointers; based on using a long format service function, passing an in-memory short pointer as a parameter in a long format to use the long format service function, wherein the passing includes loading or accessing a long pointer representation in a parameter list holding an image of a long form register representation of the parameter; and using the one or more long pointers to access memory within the first portion of the address space addressable by short pointers. 8. The computer system of claim 7 , wherein the converting a short pointer to a long pointer includes zero extending the short pointer. 9. The computer system of claim 7 , wherein the method further comprises configuring the address space for use by the plurality of types of applications, the configuring defining a first range of addresses for the first portion of the address space and a second range of addresses for the second portion of the address space. 10. The computer system of claim 9 , wherein the configuring further comprises providing a shadow copy of the first portion of the address space to protect against a wrap around of addresses. 11. The computer system of claim 7 , wherein the method further comprises: obtaining an application to be executed; determining the application is the short pointer mode application; and loading the short pointer mode application in the first portion of the address space, based on determining the application is the short pointer mode application. 12. A computer program product for facilitating processing in a computing environment, said computer program product comprising: a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: executing a short pointer mode application loaded in an address space configured for use by a plurality of types of applications including the short pointer mode application and a long pointer mode application, the address space having a first portion addressable by short pointers of a defined size and a second portion addressable by long pointers of another defined size, the other defined size being different from the defined size; and based on executing the short pointer mode application: converting one or more short pointers of the short pointer mode application to one or more long pointers; based on using a long format service function, passing an in-memory short pointer as a parameter in a long format to use the long format service function, wherein the passing includes loading or accessing a long pointer representation in a parameter list holding an image of a long form register representation of the parameter; and using the one or more long pointers to access memory within the first portion of the address space addressable by short pointers. 13. The computer program product of claim 12 , wherein the converting a short pointer to a long pointer includes zero extending the short pointer. 14. The computer program product of claim 12 , wherein the method further comprises configuring the address space for use by the plurality of types of applications, the configuring defining a first range of addresses for the first portion of the address space and a second range of addresses for the second portion of the address space. 15. The computer program product of claim 14 , wherein the configuring further comprises providing a shadow copy of the first portion of the address space to protect against a wrap around of addresses. 16. The computer program product of claim 12 , wherein the defined size is one of 31 bits or 32 bits, and the other defined size is 64 bits. 17. The computer program product of claim 12 , wherein the method further comprises loading the short pointer mode application in the first portion of the address space. 18. The computer program product of claim 12 , wherein the method further comprises: obtaining an application to be executed; determining the application is the short pointer mode application; and loading the short pointer mode application in the first portion of the address space, based on determining the application is the short pointer mode application. 19. The computer program product of claim 18 , wherein the determining includes checking a field associated with the

Assignees

Inventors

Classifications

  • G06F9/342Primary

    Extension of operand address space · CPC title

  • according to execution mode, e.g. mode flag · CPC title

  • Target code generation · CPC title

  • Register allocation; Assignment of physical memory space to logical memory space · CPC title

  • Pointers; Aliasing · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10248423B2 cover?
A short pointer mode application is loaded in an address space configured for use by a plurality of types of applications including the short pointer mode application and a long pointer mode application. The address space has a first portion addressable by short pointers of a defined size and a second portion addressable by long pointers of another defined size. The other defined size is differ…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F9/342. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 02 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).