Register partition and protection for virtualized processing device

Patent metadata

Field	Value
Publication number	US-10509666-B2
Application number	US-201715637810-A
Country	US
Kind code	B2
Filing date	Jun 29, 2017
Priority date	Jun 29, 2017
Publication date	Dec 17, 2019
Grant date	Dec 17, 2019

Abstract

A register protection mechanism for a virtualized accelerated processing device (“APD”) is disclosed. The mechanism protects registers of the accelerated processing device designated as physical-function-or-virtual-function registers (“PF-or-VF* registers”), which are single architectural instance registers that are shared among different functions that share the APD in a virtualization scheme whereby each function can maintain a different value in these registers. The protection mechanism for these registers comprises comparing the function associated with the memory address specified by a particular register access request to the “currently active” function for the APD and disallowing the register access request if a match does not occur.

First claim

What is claimed is:

1. A method for protecting a register for a virtualization-enabled processing device, the method comprising:
receiving a request to access the register of the virtualization-enabled processing device, the register being time-shared among functions in a virtualization scheme such that a different function owns the register during a different time-slice of the virtualization scheme, wherein a function that owns a register is a function that is permitted to access the register;
analyzing an address specified by the request to obtain a requester function identifier and an offset;
identifying a hardware unit having the register based on the offset;
forwarding the requester function identifier and the offset to the hardware unit having the register;
determining that the requester function identifier and an active function identifier indicate different functions, wherein the active function identifier indicates which function is currently active on the virtualization-enabled processing device, wherein a function that is currently active is a function whose time slice currently has work being performed; and,
in response to the determining, preventing the access to the register from occurring for the currently active function, the access including the currently active function reading from or writing to the register.

2. The method of claim 1 , further comprising:
receiving a second request to access the register;
analyzing a second specified by the second request to obtain a second requester function identifier and a second offset;
identifying a second hardware unit having the second register based on the second offset;
forwarding the second requester function identifier and the second offset to the second hardware unit having the second register;
determining that the second requester function identifier and the second active function identifier indicate the same function; and
in response, allowing the second access to the second register to occur.

3. The method of claim 1 , further comprising:
determining that a time-slice for a first function has ended and that a time slice for a second function is to be started; and
responsive to the determining, saving a value stored in the register for the first function to a first backup memory for the first function and loading a value from a second backup memory for the second function to the register.

4. The method of claim 3 , wherein the register comprises:
a register that is used for operations of a physical function of the functions of the virtualization scheme or of virtual functions of the functions of the virtualization scheme.

5. The method of claim 1 , wherein analyzing the address specified by the request to obtain the requester function identifier and the offset comprises:
identifying which address range, of a set of address ranges, the address specified by the request falls within; and
identifying the requester function identifier as the function identifier assigned to the identified address range, according to a register access block.

6. The method of claim 1 , wherein:
identifying the hardware unit associated with the register based on the offset is performed without considering the function identifier.

7. The method of claim 1 , wherein the receiving, analyzing, identifying, forwarding, and comparing are performed while a virtual machine associated with the function that is currently active is permitted to directly access registers, including the register, via a system physical memory address.

8. The method of claim 1 , wherein the receiving, analyzing, identifying, forwarding, and comparing is performed via a doorbell mechanism.

9. A virtualization-enabled processing device, comprising:
a register access circuit configured to:
receive a request to access a register of the virtualization enabled processing device, the register being time-shared among functions in a virtualization scheme such that a different function owns the register during a different time-slice of the virtualization scheme, wherein a function that owns a register is a function that is permitted to access the register,
analyze an address specified by the request to obtain a requester function identifier and an offset,
identify a hardware unit having the register based on the offset, and
forward the requester function identifier and the offset to the hardware unit having the register; and
a register protection circuit configured to:
determine that the requester function identifier and an active function identifier indicate different functions, wherein the active function identifier indicates which function is currently active on the virtualization enabled processing device, wherein a function that is currently active is a function whose time slice currently has work being performed; and
in response to the determining, prevent the access to the register from occurring for the currently active function, the access including the currently active function reading from or writing to the register.

10. The virtualization enabled processing device of claim 9 , wherein:
the register access circuit is further configured to:
receive a second request to access the register;
analyze a second address specified by the second request to obtain a second requester function identifier and a second offset;
identify a second hardware unit having the second register based on the second offset;
forward the second requester function identifier and the second offset to the second hardware unit, having the second register; and

the register protection circuit is further configured to:
determine that the second requester function identifier and the active function identifier indicate the same function; and
in response, allow the second access to the second register to occur.

11. The virtualization enabled processing device of claim 9 , further comprising a virtualization scheduler configured to:
determine that a time-slice for a first function has ended and that a time slice for a second function is to be started; and
responsive to the determining, save a value stored in the register for the first function to a first backup memory for the first function and loading a value from a second backup memory for the second function to the register.

12. The virtualization enabled processing device of claim 11 , wherein the register comprises:
a register that is used for operations of a physical function of the functions of the virtualization scheme or of virtual functions of the functions of the virtualization scheme.

13. The virtualization enabled processing device of claim 9 , wherein the register access circuit is configured to analyze the address specified by the request to obtain the function identifier and the offset by:
identifying which address range, of a set of address ranges, the address specified by the request falls within; and
identifying the requester function as the function identifier assigned to the identified address range, according to a register access circuit.

14. The virtualization enabled processing device of claim 9 , wherein the register access circuit is configured to identify the hardware unit associated with the register by without considering the function identifier.

15. The virtualization enabled processing device of claim 9 , wherein the operations of receiving, analyzing, identifying, forwarding, and comparing are performed while a virtual machine associated with the function that is currently active is permitted to directly access registers, including the register, via a system physical memory address.

16

Assignees

• Ati Technologies Ulc

Inventors

• Asaro Anthony
• Jiang Yinan
• Zytaruk Kelly Donald Clark

Classifications

• G06F2009/45583

  Memory management, e.g. access or allocation · CPC title

• G06F21/53

  by executing in a restricted environment, e.g. sandbox or secure virtual machine · CPC title

• G06F9/4843

  by program, e.g. task dispatcher, supervisor, operating system · CPC title

• G06F9/342

  Extension of operand address space · CPC title

• G06F9/45558 Primary

  Hypervisor-specific management and integration aspects · CPC title