Managing the capture of information in applications with prefix instructions

Patent metadata

Field	Value
Publication number	US-10877759-B2
Application number	US-201514871979-A
Country	US
Kind code	B2
Filing date	Sep 30, 2015
Priority date	Sep 30, 2015
Publication date	Dec 29, 2020
Grant date	Dec 29, 2020

Abstract

Managing the capture of information. A plurality of instruction units of an instruction stream are received in parallel by a plurality of instruction decode units of a processor. One instruction decode unit of the plurality of instruction decode units receives a prefix instruction and another instruction decode unit of the plurality of instruction decode units receives a prefixed instruction. The prefixed instruction is an instruction to be modified by the prefix instruction. Information associated with processing of the plurality of instruction units is captured, and the capturing includes modifying the information to be captured to manage the prefix instruction and the prefixed instruction separately received by the instruction decode units as a single instruction.

First claim

What is claimed is:

1. A computer program product for managing the capture of information, the computer program product comprising:
a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising:
receiving, in parallel by a plurality of instruction decode units of a processor, a plurality of instruction units of an instruction stream to be processed, wherein one instruction decode unit of the plurality of instruction decode units receives a prefix instruction and another instruction decode unit of the plurality of instruction decode units receives a prefixed instruction, the prefixed instruction being an instruction to be modified by the prefix instruction; and
capturing information associated with processing of the plurality of instruction units, wherein the capturing includes modifying the information to be captured to manage the prefix instruction and the prefixed instruction separately received by the instruction decode units as a single instruction, and wherein the capturing information includes counting a number of instructions to be processed, wherein the counting skips counting one of the prefix instruction or the prefixed instruction, and counts the other of the prefix instruction or the prefixed instruction.

2. The computer program product of claim 1 , wherein the method further comprises providing an indication of the prefix instruction.

3. The computer program product of claim 1 , wherein the capturing information includes sampling instructions, and the sampling includes skipping one of the prefix instruction or the prefixed instruction.

4. The computer program product of claim 1 , wherein the method further comprises providing the captured information to be used in managing the processor.

5. The computer program product of claim 1 , wherein the method further comprises:
determining whether a last instruction decode unit of the plurality of instruction decode units is to receive the prefix instruction; and
based on determining that the last instruction decode unit is to receive the prefix instruction, delaying forwarding the prefix instruction to the one instruction decode unit until both the prefix instruction and the prefixed instruction are to be received in parallel.

6. The computer program product of claim 5 , wherein the delaying forwarding includes:
saving the prefix instruction for later processing; and
including the prefix instruction in a next group of a plurality of instruction units to be processed.

7. The computer program product of claim 1 , wherein the prefix instruction is a same size as the prefixed instruction.

8. The computer program product of claim 1 , wherein a size of an instruction unit is defined by an instruction set architecture of an architecture of the processor.

9. The computer program product of claim 1 , wherein the method further comprises:
executing the prefixed instruction;
determining an event has occurred; and
based on determining the event has occurred, reporting the event and an indication that the prefixed instruction has the prefix.

10. A computer system for managing the capture of information, the computer system comprising:
a memory; and
a processor in communication with the memory, wherein the computer system is configured to perform a method, said method comprising:
receiving, in parallel by a plurality of instruction decode units of the processor, a plurality of instruction units of an instruction stream to be processed, wherein one instruction decode unit of the plurality of instruction decode units receives a prefix instruction and another instruction decode unit of the plurality of instruction decode units receives a prefixed instruction, the prefixed instruction being an instruction to be modified by the prefix instruction; and
capturing information associated with processing of the plurality of instruction units, wherein the capturing includes modifying the information to be captured to manage the prefix instruction and the prefixed instruction separately received by the instruction decode units as a single instruction, and wherein the capturing information includes counting a number of instructions to be processed, wherein the counting skips counting one of the prefix instruction or the prefixed instruction, and counts the other of the prefix instruction or the prefixed instruction.

11. The computer system of claim 10 , wherein the capturing information includes sampling instructions, and the sampling includes skipping one of the prefix instruction or the prefixed instruction.

12. The computer system of claim 10 , wherein the method further comprises:
determining whether a last instruction decode unit of the plurality of instruction decode units is to receive the prefix instruction; and
based on determining that the last instruction decode unit is to receive the prefix instruction, delaying forwarding the prefix instruction to the one instruction decode unit until both the prefix instruction and the prefixed instruction are to be received in parallel.

13. The computer system of claim 10 , wherein the method further comprises:
executing the prefixed instruction;
determining an event has occurred; and
based on determining the event has occurred, reporting the event and an indication that the prefixed instruction has the prefix.

14. A computer-implemented method of managing the capture of information, the computer-implemented method comprising:
receiving, in parallel by a plurality of instruction decode units of a processor, a plurality of instruction units of an instruction stream to be processed, wherein one instruction decode unit of the plurality of instruction decode units receives a prefix instruction and another instruction decode unit of the plurality of instruction decode units receives a prefixed instruction, the prefixed instruction being an instruction to be modified by the prefix instruction; and
capturing information associated with processing of the plurality of instruction units, wherein the capturing includes modifying the information to be captured to manage the prefix instruction and the prefixed instruction separately received by the instruction decode units as a single instruction, and wherein the capturing information includes counting a number of instructions to be processed, wherein the counting skips counting one of the prefix instruction or the prefixed instruction, and counts the other of the prefix instruction or the prefixed instruction.

15. The computer-implemented method of claim 14 , wherein the capturing information includes sampling instructions, and the sampling includes skipping one of the prefix instruction or the prefixed instruction.

16. The computer-implemented method of claim 14 , further comprising:
determining whether a last instruction decode unit of the plurality of instruction decode units is to receive the prefix instruction; and
based on determining that the last instruction decode unit is to receive the prefix instruction, delaying forwarding the prefix instruction to the one instruction decode unit until both the prefix instruction and the prefixed instruction are to be received in parallel.

17. The computer-implemented method of claim 14 , further comprising:
executing the prefixed instruction;
determining an event has occurred; and
based on determining the event has occurred, reporting the event and an indication that the prefixed instruction has the prefix.

18. The computer system of claim 10 ,

Assignees

• IBM

Inventors

• Gschwind Michael K

Classifications

• G06F9/30076 Primary

  to perform miscellaneous control operations, e.g. NOP · CPC title

• G06F9/3824

  Operand accessing · CPC title

• G06F9/3016 Primary

  Decoding the operand specifier, e.g. specifier format · CPC title

• G06F9/342

  Extension of operand address space · CPC title

• G06F9/30185

  according to one or more bits in the instruction, e.g. prefix, sub-opcode · CPC title