Apparatus and method for controlling execution of processes in a parallel computing system
US-9830195-B2 · Nov 28, 2017 · US
using a time-dependent priority, e.g. individually loaded time counters or time slot
using a time-dependent priority, e.g. individually loaded time counters or time slot · Cooperative Patent Classification (CPC)
Computing, optics, measurement, and control technologies.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | G06F13/372 |
| Official title | using a time-dependent priority, e.g. individually loaded time counters or time slot |
| Display label | using a time-dependent priority, e.g. individually loaded time counters or time slot |
| Total patents | 183 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is declining.
| Year | Patents |
|---|---|
| 2015 | 27 |
| 2016 | 23 |
| 2017 | 27 |
| 2018 | 11 |
| 2019 | 17 |
| 2020 | 13 |
| 2021 | 13 |
| 2022 | 22 |
| 2023 | 12 |
| 2024 | 11 |
| 2025 | 7 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Interface module
US-9804982-B2 · Oct 31, 2017 · US
Data processing device
US-9747232-B2 · Aug 29, 2017 · US
All-connected by virtual wires network of data processing nodes
US-2017222945-A1 · Aug 3, 2017 · US
Bus ownership hand-off techniques
US-2017199839-A1 · Jul 13, 2017 · US
Reserving space in a mail queue
US-9697060-B2 · Jul 4, 2017 · US
Synchronization mechanisms for high-integrity computing
US-9612985-B1 · Apr 4, 2017 · US
CAN bus edge timing control for dominant-to-recessive transitions
US-9606948-B2 · Mar 28, 2017 · US
Intercomponent data communication between multiple time zones
US-9563594-B2 · Feb 7, 2017 · US
Information-processing device, processing method thereof, and input/output device
US-2017017516-A1 · Jan 19, 2017 · US
Reserving space in a mail queue
US-9525655-B1 · Dec 20, 2016 · US
Device and method for global time information in event-controlled bus communication
US-9514073-B2 · Dec 6, 2016 · US
Synchronous wired-or ACK status for memory with variable write latency
US-9515204-B2 · Dec 6, 2016 · US
Semiconductor device
US-2016350243-A1 · Dec 1, 2016 · US
Memory buffering system that improves read/write performance and provides low latency for mobile systems
US-9477617-B2 · Oct 25, 2016 · US
Controlling bus access in a real-time computer system
US-9477624-B2 · Oct 25, 2016 · US
Optimized credit return mechanism for packet sends
US-9477631-B2 · Oct 25, 2016 · US
Shared control of a phase locked loop (pll) for a multi-port physical layer (phy)
US-2016292112-A1 · Oct 6, 2016 · US
Controlling bus access priority in a real-time computer system
US-9460036-B2 · Oct 4, 2016 · US
Leases in a heterogenous data environment
US-9436635-B1 · Sep 6, 2016 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC G06F13/372?
- CPC G06F13/372 is the Cooperative Patent Classification code for “using a time-dependent priority, e.g. individually loaded time counters or time slot.”
- How many patents are filed under CPC G06F13/372 (using a time-dependent priority, e.g. individually loaded time counters or time slot)?
- Our database includes 183 publications tagged with this CPC code.
- Is patent activity under CPC G06F13/372 growing?
- Publication counts under this code: 11 in 2024 vs 7 in 2025 (latest complete years).