Design-aware pattern density control in directed self-assembly graphoepitaxy process

Patent metadata

Field	Value
Publication number	US-9984920-B2
Application number	US-201615206789-A
Country	US
Kind code	B2
Filing date	Jul 11, 2016
Priority date	Jul 11, 2016
Publication date	May 29, 2018
Grant date	May 29, 2018

Abstract

A method for local pattern density control of a device layout used by graphoepitaxy directed self-assembly (DSA) processes includes importing a multi-layer semiconductor device design into an assist feature system and determining overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation. A fill for assist features is generated to provide dimensional consistency of device features by employing the overlapping regions to provide placement of the assist features. An updated device layout is stored in a memory device.

First claim

What is claimed is:

1. A method for pattern density control of a device layout, the method comprising:
importing a multi-layer semiconductor device design into an assist feature generation system;
determining prohibited regions and allowed regions for assist features based on overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation;
generating a fill for the assist features to provide dimensional consistency of device features by employing at least the overlapping regions to provide placement of the assist features; and
storing an updated device layout in a memory device.

2. The method as recited in claim 1 , further comprising feeding the allowed regions to a fill engine to create the fill and to check parameters of the fill.

3. The method as recited in claim 2 , wherein the parameters of the fill include one or more of each of: a fill distance between assist features to main features, a critical dimensions and a fill orientation.

4. The method as recited in claim 1 , further comprising checking fill density against a density specification.

5. The method as recited in claim 4 , wherein if the fill density is outside the density specification, returning to the determining overlapping regions step.

6. The method as recited in claim 1 , further comprising fabricating a semiconductor device having the assist features of the fill formed on layers of the semiconductor device.

7. The method as recited in claim 6 , wherein the fabricating step includes fabricating the assist features using a directed self-assembly process.

8. The method as recited in claim 1 , further comprising generating a density map for display on a display device and fine-tuning density of the assist features using the density map.

9. A non-transitory computer readable storage medium comprising a computer readable program for pattern density control of a device layout, wherein the computer readable program, when executed on a computer, causes the computer to perform steps of:
importing a multi-layer semiconductor device design into an assist feature system;
determining overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation;
generating a fill for assist features to provide dimensional consistency of device features by employing at least the overlapping regions to provide placement of the assist features; and
storing an updated device layout in a memory device.

10. The non-transitory computer readable storage medium as recited in claim 9 , wherein the computer readable program further causes the computer to perform a step of feeding the fill to a fill engine to check parameters of the fill.

11. The non-transitory computer readable storage medium as recited in claim 10 , wherein the parameters of the fill include one or more of each of: fill distances, critical dimensions and a fill orientation.

12. The non-transitory computer readable storage medium as recited in claim 9 , wherein the computer readable program further causes the computer to perform a step of checking fill density against a density specification.

13. The non-transitory computer readable storage medium as recited in claim 12 , wherein if the fill density is outside the density specification, returning to the step of determining overlapping regions.

14. The non-transitory computer readable storage medium as recited in claim 9 , wherein the computer readable program further causes the computer to perform a step of fabricating a semiconductor device layout having the assist features of the fill included on layers of the semiconductor device layout.

15. The non-transitory computer readable storage medium as recited in claim 14 , wherein the fabricating step includes fabricating the assist features using a directed self-assembly process.

16. The non-transitory computer readable storage medium as recited in claim 9 , wherein the computer readable program further causes the computer to perform a step of generating a density map for display on a display device and fine-tuning a density of the assist features using the density map.

17. A semiconductor device, comprising:
multiple metallization layers;
at least one region determined to be free of assist features based upon a presence of an overlap between metal layers between the multiple metallization layers of the device; and
a fill for assist features formed on one or more layers of the semiconductor device to provide dimensional consistency of device features, the assist features being placed in accordance with the overlap to provide placement of the assist features.

18. The device as recited in claim 17 , wherein the assist features are placed in accordance with one or more of: a fill distance from the device features to other assist features, critical dimensions of the device features and a fill orientation relative to the device features.

19. The device as recited in claim 17 , wherein the assist features include directed self-assembly assist features.

20. The device as recited in claim 17 , wherein the assist features include a material selected from the group consisting of poly(styrene), poly(methyl methacrylate) and poly(hydroxystyrene) diblock copolymers.

Assignees

• IBM

Inventors

• Chen Hsueh-Chung
• Chi Cheng
• Hu Lin
• Lai Kafai
• Liu Chi-Chun
• Pitera Jed W

Classifications

• H10P76/00

  Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography · CPC title

• H10P14/6516

  of treatments performed after formation of the materials · CPC title

• H10P14/683

  carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC · CPC title

• H10W20/43

  Layouts of interconnections · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title