Selective backside recessing of source and drain regions
US-12563810-B1 · Feb 24, 2026 · US
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Hu Lin patents
Hu Lin is listed as an inventor on 26 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Hu Lin |
| Total patents | 26 |
| First publication | Jan 11, 2018 |
| Latest publication | Feb 24, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Backside processing of fins in fin based transistor devices
US-12543367-B2 · Feb 3, 2026 · US
Integrated circuit structure with zero diffusion break and wrap-around contact
US-2026006837-A1 · Jan 1, 2026 · US
Fabrication of ribbon cfets with optimized nmos and pmos channel materials
US-2026006873-A1 · Jan 1, 2026 · US
Fabrication of gate-all-around integrated circuit structures having selectively grown metal gate structures
US-2026006838-A1 · Jan 1, 2026 · US
Self-aligned fork-last backbone for forksheet transistors
US-2026006842-A1 · Jan 1, 2026 · US
Integrated circuit structures having differentiated dielectric boundary walls
US-2026006836-A1 · Jan 1, 2026 · US
Substrate-less lateral diode integrated circuit structures
US-12507475-B2 · Dec 23, 2025 · US
Integrated circuit structures with backside isolation structure
US-2025386580-A1 · Dec 18, 2025 · US
Contact over active gate structures with widened and lower capacitance insulating cap layers for advanced integrated circuit structure fabrication
US-2025386578-A1 · Dec 18, 2025 · US
Recent patents
Latest publications not already listed above.
Substrate-free integrated circuit structures
US-2025254993-A1 · Aug 7, 2025 · US
Substrate-free integrated circuit structures
US-12317590-B2 · May 27, 2025 · US
Integrated circuit structures having metal gate cut plug structures
US-2025159932-A1 · May 15, 2025 · US
Gate cut, and source and drain contacts
US-2024222447-A1 · Jul 4, 2024 · US
Backside processing of fins in fin based transistor devices
US-2023307449-A1 · Sep 28, 2023 · US
Substrate-less nanowire-based lateral diode integrated circuit structures
US-2022416022-A1 · Dec 29, 2022 · US
Substrate-less lateral diode integrated circuit structures
US-2022415925-A1 · Dec 29, 2022 · US
Substrate-free integrated circuit structures
US-2022102385-A1 · Mar 31, 2022 · US
Source/drain contact depth control
US-10991796-B2 · Apr 27, 2021 · US
Source/drain contact depth control
US-2020203480-A1 · Jun 25, 2020 · US
On-chip resistors with direct wiring connections
US-10566411-B2 · Feb 18, 2020 · US
Design-aware pattern density control in directed self-assembly graphoepitaxy process
US-10361116-B2 · Jul 23, 2019 · US
On-chip resistors with direct wiring connections
US-2019181215-A1 · Jun 13, 2019 · US
Design-aware pattern density control in directed self-assembly graphoepitaxy process
US-2018211869-A1 · Jul 26, 2018 · US
Design-aware pattern density control in directed self-assembly graphoepitaxy process
US-9984920-B2 · May 29, 2018 · US
Design-aware pattern density control in directed self-assembly graphoepitaxy process
US-2018012795-A1 · Jan 11, 2018 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 18 |
| IBM | 4 |
| Globalfoundries Inc | 3 |
| Globalfoundries Us Inc | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10D84/038 | 14 |
| H10D30/6735 | 13 |
| H10D62/121 | 13 |
| H10D30/6757 | 11 |
| H10D30/43 | 10 |