Single use rinse in a linear marangoni drier
US-2017323810-A1 · Nov 9, 2017 · US
US9818599B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9818599-B2 |
| Application number | US-201314062136-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 24, 2013 |
| Priority date | Oct 24, 2012 |
| Publication date | Nov 14, 2017 |
| Grant date | Nov 14, 2017 |
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A method for in-situ dry cleaning of a SiGe semiconductor surface doses the SiGe surface with ex-situ wet HF in a clean ambient environment or in-situ dosing with gaseous NH 4 F to remove oxygen containing contaminants. Dosing the SiGe surface with atomic H removes carbon containing contaminants. Low temperature annealing pulls the surface flat. Passivating the SiGe semiconductor surface with H 2 O 2 vapor for a sufficient time and concentration forms an a oxygen monolayer(s) of —OH sites on the SiGe. Second annealing the SiGe semiconductor surface is conducted at a temperature below that which would induce dopant diffusion. A method for in-situ dry cleaning of a SiGe semiconductor surface, ex-situ degreases the Ge containing semiconductor surface and removes organic contaminants. The surface is then dosed with HF(aq) or NH4F(g) generated via NH 3 +NH or NF 3 with H 2 or H 2 O to remove oxygen containing contaminants. In-situ dosing of the SiGe surface with atomic H removes carbon containing contaminants.
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The invention claimed is: 1. A method for in-situ dry cleaning of a SiGe semiconductor surface, comprising: dosing the SiGe surface with ex-situ wet HF in a clean ambient environment or in-situ dosing with gaseous NH 4 F; dosing the SiGe surface with atomic H; low temperature (below ˜550° C.) annealing to pull the SiGe surface flat; in a vacuum chamber, passivating the SiGe semiconductor surface with H 2 O 2 vapor to form a monolayer(s) of —OH sites on the SiGe; and in the vacuum chamber, second annealing the SiGe semiconductor surface at a temperature below ˜650° C. to avoid dopant diffusion. 2. The method of claim 1 , wherein said dosing the SiGe surface comprises dosing with HF(aq). 3. The method of claim 1 , wherein said dosing the SiGe surface with NH 4 comprises in-situ thermally mixing NH 3 +NF 3 or mixing in a plasma. 4. The method of claim 1 , wherein said dosing the SiGe surface with NH 4 comprises in-situ plasma mixing of NF 3 with H 2 or H 2 O. 5. The method of claim 1 , wherein said dosing the SiGe surface with HF comprises wet-dipping in HF/H 2 O, followed by keeping the SiGe surface in an inert atmosphere and then followed by said dosing with the SiGe surface with atomic H, conduct in-situ. 6. The method of claim 1 , wherein said low temperature annealing is conducted at or below ˜350° C. 7. The method of claim 1 , further comprising a preliminary step of degreasing the SiGe surface. 8. The method of claim 7 , wherein the degreasing comprises sonication in acetone, methanol and high performance liquid chromatography (HPLC) water. 9. The method of claim 1 , wherein the vacuum chamber comprises an atomic layer deposition (ALD) reactor. 10. The method of claim 1 , wherein SiGe semiconductor surface is SiGe(110) or SiGe(100). 11. The method of claim 1 , further comprising, in the vacuum chamber, providing a monolayer passivation and nucleation by depositing a monolayer of H 2 O 2 , followed by an anneal, followed by saturation with trimethylaluminum (TMA) and an anneal. 12. The method of claim 11 , wherein the vacuum chamber comprises an atomic layer deposition (ALD) reactor. 13. The method of claim 1 , wherein the H 2 O 2 comprises 2% vapor H 2 O 2 (g)/H 2 O(g). 14. The method of claim 1 , further comprising forming a monolayer of —OH sites with a saturation dose of H 2 O 2 (g). 15. The method of claim 14 , further comprising applying a saturation dose of trimethylaluminum (TMA) to form dimethylaluminum (DMA) bonded to the H 2 O 2 (g) saturated SiGe semiconductor surface via an Al—O—Ge/Si bond. 16. The method of claim 14 , further comprising conducting an anneal after said applying a saturation dose of trimethylaluminum (TMA) at a temperature of ˜200-300° C.
by combined dry cleaning and wet cleaning (H10P70/52 takes precedence) · CPC title
by dry cleaning only (H10P70/52 takes precedence) · CPC title
Etching of wafers, substrates or parts of devices · CPC title
by exposure to a gas or vapour · CPC title
In-situ cleaning · CPC title
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