Comparator circuit having a calibration circuit

Patent metadata

Field	Value
Publication number	US-9742384-B2
Application number	US-201514617183-A
Country	US
Kind code	B2
Filing date	Feb 9, 2015
Priority date	Mar 15, 2012
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

A comparator circuit includes a comparator, a first selection circuit, and a switched-capacitor circuit. The comparator has a first terminal, a second terminal, and an output terminal. The comparator is configured to generate an output signal at the output terminal based on a first signal on the first terminal and a second signal on the second terminal. The first selection circuit is coupled with the first terminal of the comparator and configured to selectively set a first input signal or a first calibration signal as the first signal in response to a control signal. The switched-capacitor circuit is coupled with the output terminal and the second terminal of the comparator. The switched-capacitor circuit is configured to adjust and output the second signal based on the output signal.

First claim

What is claimed is:

1. A comparator circuit comprising:
a comparator having a first terminal, a second terminal, and an output terminal, the comparator being configured to generate an output signal at the output terminal based on a first signal on the first terminal and a second signal on the second terminal;
a first selection circuit coupled with the first terminal of the comparator and configured to set a first input signal as the first signal in response to a control signal having a first logical value and a first calibration signal as the first signal in response to the control signal having a second logical value different from the first logical value; and
a switched-capacitor circuit coupled with the output terminal and the second terminal of the comparator, the switched-capacitor circuit being configured to adjust and output the second signal based on the output signal,
wherein the comparator is configured to:
generate the output signal based on the first input signal and the second signal in response to the control signal having the first logical value, and
generate the output signal based on the first calibration signal and the second signal in response to the control signal having the second logical value; and

wherein:
the comparator further comprises a third terminal and a fourth terminal, the comparator being configured to generate the output signal at the output terminal based on the first signal on the first terminal, the second signal on the second terminal, a third signal on the third terminal, and a fourth signal on the fourth terminal;
the switched-capacitor circuit is coupled with the second terminal and the fourth terminal of the comparator, the switched-capacitor circuit being configured to adjust and output the fourth signal based on the output signal; and
the comparator circuit further comprises a second selection circuit coupled with the third terminal of the comparator and configured to selectively set a second input signal or a second calibration signal as the third signal in response to the control signal.

2. The comparator circuit of claim 1 , wherein the switched-capacitor circuit comprises:
a first node;
a first capacitive device coupled with the first node;
a second node;
a second capacitive device coupled with the second node;
a third node;
a first switch coupled between the third node and a first reference voltage;
a second switch coupled between the third node and a second reference voltage;
a third switch coupled between the first node and the third node; and
a fourth switch coupled between the first node and the second node.

3. The comparator circuit of claim 2 , wherein
the first capacitive device has a first capacitance value;
the second capacitive device has a second capacitance value; and
a capacitance ratio of the switched-capacitor circuit is determined based on a predetermined step size of adjustment.

4. The comparator circuit of claim 3 , wherein the capacitance ratio ranges from 40 to 100.

5. The comparator circuit of claim 2 , wherein
the first switch is set to be closed responsive to a first logical state of the output signal at the output terminal of the comparator; and
the second switch is set to be closed responsive to a second logical state of the output signal at the output terminal of the comparator.

6. The comparator circuit of claim 2 , wherein
the third switch is controlled based on a first phase signal;
the fourth switch is controlled based on a second phase signal; and
the third switch and the fourth switch are free from being set to be closed concurrently.

7. The circuit of claim 1 , wherein the switched-capacitor circuit is configured to
increase a voltage level of the second signal based on a first logical value of the output signal at the output terminal of the comparator; and
decrease the voltage level of the second signal based on a second logical value of the output signal at the output terminal of the comparator.

8. The comparator circuit of claim 1 , wherein the switched-capacitor circuit is configured to
adjust a voltage level of the second signal responsive to a first logical value of the control signal; and
maintain the voltage level of the second signal responsive to a second logical value of the control signal.

9. The comparator circuit of claim 1 , wherein the switched-capacitor circuit comprises:
a first node;
a second node;
a third node;
a fourth node;
a first capacitive device coupled between the first node and the third node;
a second capacitive device coupled between the second node and the fourth node;
a fifth node;
a sixth node;
a first switch coupled between the fifth node and a first reference voltage;
a second switch coupled between the fifth node and a second reference voltage;
a third switch coupled between the sixth node and the second reference voltage;
a fourth switch coupled between the sixth node and the first reference voltage;
a fifth switch coupled between the first node and the fifth node;
a sixth switch coupled between the first node and the second node;
a seventh switch coupled between the third node and the sixth node; and
an eighth switch coupled between the third node and the fourth node.

10. The comparator circuit of claim 9 , wherein
the first switch is set to be closed responsive to a first logical state of the output signal at the output terminal of the comparator;
the second switch is set to be closed responsive to a second logical state of the output signal at the output terminal of the comparator;
the third switch is set to be closed responsive to the second logical state of the output signal at the output terminal of the comparator; and
the fourth switch is set to be closed responsive the first logical state of the output signal at the output terminal of the comparator.

11. The comparator circuit of claim 9 , wherein
the fifth switch and the seventh switch are controlled based on a first phase signal;
the sixth switch and the eight switch are controlled based on a second phase signal;
the fifth switch and the sixth switch are free being set to be closed concurrently; and
the seventh switch and the eight switch are free being set to be closed concurrently.

12. The comparator circuit of claim 9 , wherein the switched-capacitor circuit is configured to
adjust a voltage level of the second signal and a voltage level of the fourth signal responsive to the first logical value of the control signal; and
maintain the voltage level of the second signal and the voltage level of the fourth signal responsive to the second logical value of the control signal.

13. A method comprising:
outputting, by a comparator, an output signal at an output terminal of the comparator based on a voltage level of a first signal at a first terminal of the comparator, a voltage level of a second signal at a second terminal of the comparator, a voltage level of a third signal at a third terminal of the comparator, and a voltage level of a fourth signal at a fourth terminal of the comparator;
responsive to a first logical state of a control signal:
setting a first calibration signal as the first signal at the first terminal of the comparator and a second calibration signal as the third signal at the third terminal of the comparator; and
adjusting, by a switched-capacitor circuit, the voltage level of the second signal at the second terminal of the comparator and the voltage level of the fourth signal at the fourth terminal of the comparator based on the output signal at the output terminal of the comparator; and

responsive to a second logical state of the control signal:
setting a f

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Soenen Eric
• Roth Alan
• Shi Justin

Classifications

• H03K3/013

  Modifications of generator to prevent operation by noise or interference · CPC title

• H03K5/24

  the characteristic being amplitude · CPC title

• H03K5/02 Primary

  by amplifying (H03K5/04 takes precedence) · CPC title

• H03K5/125

  Discriminating pulses (measuring characteristics of individual pulses G01R29/02; separation of synchronising signals in television systems H04N5/08) · CPC title