Method for patterning a graphene layer and method for manufacturing a display substrate

US9633899B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9633899-B2
Application numberUS-201414513324-A
CountryUS
Kind codeB2
Filing dateOct 14, 2014
Priority dateJun 10, 2014
Publication dateApr 25, 2017
Grant dateApr 25, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The invention provides a method for patterning a graphene layer and a method for manufacturing a display substrate. The method for patterning a graphene layer comprises: forming an isolation layer on a graphene layer; forming a photoresist layer on the isolation layer; patterning the photoresist layer; etching the isolation layer according to the patterned photoresist layer to form a patterned isolation layer; etching the graphene layer according to the patterned photoresist layer to form a patterned graphene layer; and removing the patterned isolation layer. In the method of the invention, the unfavorable condition of the prior art may be avoided that a graphene film sloughs off or a photoresist remains on a graphene film when a photoresist material is peeled off, and the product yield can be improved in the case that the production cost is controlled.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for patterning a graphene layer, comprising: forming an isolation layer on the graphene layer; forming a photoresist layer on the isolation layer; patterning the photoresist layer; etching the isolation layer according to the patterned photoresist layer to form a patterned isolation layer; etching the graphene layer according to the patterned isolation layer to form a patterned graphene layer; and removing the patterned isolation layer, wherein the method further comprises: forming the graphene layer with a resin base before forming the isolation layer on the graphene layer; and forming a resin film with the patterned graphene layer after removing the patterned isolation layer. 2. The method according to claim 1 , further comprises: peeling off the patterned photoresist layer after etching the isolation layer according to the patterned photoresist layer to form the patterned isolation layer. 3. The method according to claim 1 , further comprises: transferring the patterned graphene layer on the resin film to a substrate via a transfer process; and removing the resin base at the resin film. 4. The method according to claim 1 , wherein the step forming the graphene layer with the resin base comprises: spin-coating a single-layer or multiple layers of water-soluble graphene material on the resin base to form the graphene layer. 5. The method according to claim 1 , wherein the step of forming the graphene layer with the resin base comprises: depositing a graphene material on a metal base to form the graphene layer; spin-coating a resin material on the graphene layer to form the resin base; and etching and removing the metal base. 6. The method according to claim 5 , wherein the material of the metal base includes any one of copper, nickel or copper-nickel alloy. 7. The method according to claim 1 , wherein the isolation layer is formed of an inorganic silicon compound material. 8. The method according to claim 7 , wherein the inorganic silicon compound material is silicon nitride. 9. The method according to claim 8 , wherein the step of removing the patterned isolation layer comprises: corroding and removing the patterned isolation layer via hydrofluoric acid. 10. The method according to claim 1 , wherein the graphene layer is formed on a substrate. 11. The method according to claim 1 , wherein the material of the isolation layer is a metal material. 12. The method according to claim 11 , wherein the metal material comprises any one of copper, nickel or copper-nickel alloy. 13. A method for manufacturing a display substrate, comprising manufacturing a structure formed of the patterned graphene layer by the method according to claim 1 . 14. A method for patterning a graphene layer, comprising: forming an isolation layer on the graphene layer; forming a photoresist layer on the isolation layer; patterning the photoresist layer; etching the isolation layer according to the patterned photoresist layer to form a patterned isolation layer; etching the graphene layer according to the patterned isolation layer to form a patterned graphene layer; and removing the patterned isolation layer, wherein the method further comprises: forming the graphene layer on a resin base before forming the isolation layer on the graphene layer; and forming a resin film with the patterned graphene layer after removing the patterned isolation layer. 15. The method according to claim 14 , wherein the step forming the graphene layer on the resin base comprises: spin-coating a single-layer or multiple layers of water-soluble graphene material on the resin base to form the graphene layer.

Assignees

Inventors

Classifications

  • characterised by their composition, e.g. multilayer masks or materials · CPC title

  • of highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers · CPC title

  • H10W70/664Primary

    Carbon-based materials, e.g. fullerenes · CPC title

  • H10W20/067Primary

    by modifying the pattern of conductive parts · CPC title

  • for lift-off processes · CPC title

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What does patent US9633899B2 cover?
The invention provides a method for patterning a graphene layer and a method for manufacturing a display substrate. The method for patterning a graphene layer comprises: forming an isolation layer on a graphene layer; forming a photoresist layer on the isolation layer; patterning the photoresist layer; etching the isolation layer according to the patterned photoresist layer to form a patterned …
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W70/664. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).