Chip resistor and mounting structure thereof

US9633768B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9633768-B2
Application numberUS-201414294477-A
CountryUS
Kind codeB2
Filing dateJun 3, 2014
Priority dateJun 13, 2013
Publication dateApr 25, 2017
Grant dateApr 25, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.

First claim

Opening claim text (preview).

The invention claimed is: 1. A chip resistor comprising: an insulating substrate; a resistor embedded in the substrate; a first electrode electrically connected to the resistor; and a second electrode electrically connected to the resistor; wherein the first electrode is spaced apart from the second electrode in a first direction perpendicular to a thickness direction of the substrate, the substrate includes a substrate reverse surface and a substrate obverse surface directed in opposite directions to each other in the thickness direction of the substrate, the resistor being recessed into the substrate with respect to the substrate obverse surface in a direction from the substrate obverse surface toward the substrate reverse surface, and the substrate includes a resin portion and a glass fiber portion in the resin portion, the resistor being in direct contact with the glass fiber portion. 2. The chip resistor according to claim 1 , wherein the entirety of the resistor overlaps the substrate in the thickness direction of the substrate. 3. The chip resistor according to claim 1 , wherein the resin portion is formed of an epoxy resin. 4. The chip resistor according to claim 1 , wherein the resin portion provides the substrate obverse surface and the substrate reverse surface. 5. The chip resistor according to claim 1 , wherein the substrate has a maximum thickness of 60 to 300 μm. 6. The chip resistor according to claim 1 , wherein the substrate includes a substrate lateral face directed in the first direction, the resistor includes a resistor lateral face directed in the first direction, and the substrate lateral face and the resistor lateral face are flush with each other. 7. The chip resistor according to claim 1 , wherein the resistor includes a resistor reverse surface and a resistor obverse surface directed in opposite directions to each other, and the resistor reverse surface is in direct contact with the substrate. 8. The chip resistor according to claim 7 , wherein the resistor obverse surface is flush with the substrate obverse surface. 9. The chip resistor according to claim 1 , wherein the resistor has a thickness of 50 to 200 μm. 10. The chip resistor according to claim 1 , further comprising an insulating layer covering the resistor. 11. The chip resistor according to claim 10 , wherein the insulating layer includes an insulating layer reverse surface and an insulating layer obverse surface directed in opposite directions to each other in the thickness direction of the substrate, and the insulating layer reverse surface is in direct contact with the substrate and the resistor. 12. The chip resistor according to claim 11 , wherein the first electrode and the second electrode are formed on the insulating layer obverse surface. 13. The chip resistor according to claim 12 , wherein the insulating layer obverse surface includes a part exposed from the first electrode and the second electrode. 14. The chip resistor according to claim 10 , wherein the insulating layer includes a portion disposed between the resistor and the first electrode, and a portion disposed between the resistor and the second electrode. 15. The chip resistor according to claim 10 , wherein the insulating layer has a heat conductance of 1.0 W/(m·K) to 5.0 W/(m·K). 16. The chip resistor according to claim 1 , wherein the first electrode includes a plated layer. 17. The chip resistor according to claim 16 , wherein the plated layer includes a Cu layer and a Sn layer, and the Cu layer is disposed between the Sn layer and the resistor. 18. The chip resistor according to claim 17 , wherein the plated layer includes a Ni layer disposed between the Cu layer and the Sn layer. 19. The chip resistor according to claim 1 , wherein the resistor has a serpentine shape. 20. The chip resistor according to claim 1 , wherein the resistor is formed of one of manganin, zeranin, a Ni—Cr alloy, a Cu—Ni alloy, and a Fe—Cr alloy. 21. A chip resistor comprising: an insulating substrate; a resistor embedded in the substrate; a first electrode electrically connected to the resistor; and a second electrode electrically connected to the resistor; wherein the first electrode is spaced apart from the second electrode in a first direction perpendicular to a thickness direction of the substrate, wherein the substrate includes a substrate lateral face directed in the first direction, the resistor includes a resistor lateral face directed in the first direction, and the substrate lateral face and the resistor lateral face are flush with each other, and wherein the substrate lateral face is directly covered with the first electrode. 22. A chip resistor comprising: an insulating substrate; a resistor embedded in the substrate; a first electrode electrically connected to the resistor; and a second electrode electrically connected to the resistor; wherein the first electrode is spaced apart from the second electrode in a first direction perpendicular to a thickness direction of the substrate, the chip resistor further comprising an insulating layer covering the resistor, wherein the insulating layer includes an insulating layer end face, the substrate includes a substrate end face, and wherein the substrate end face and the insulating layer end face are both directed in a direction perpendicular to both the thickness direction of the substrate and the first direction, and are flush with each other. 23. A chip resistor comprising: an insulating substrate; a resistor embedded in the substrate; a first electrode electrically connected to the resistor; and a second electrode electrically connected to the resistor; wherein the first electrode is spaced apart from the second electrode in a first direction perpendicular to a thickness direction of the substrate, wherein the first electrode includes a plated layer, and wherein the first electrode includes an underlying layer held in direct contact with the resistor, and the underlying layer is disposed between the plated layer and the resistor. 24. The chip resistor according to claim 23 , wherein the underlying layer overlaps the resistor when viewed in the thickness direction of the substrate, and include a portion spaced apart from the resistor in the thickness direction. 25. The chip resistor according to claim 23 , wherein the underlying layer has a thickness of 100 to 500 nm. 26. The chip resistor according to claim 23 , wherein the underlying layer is formed by one of PVD, CVD, and printing. 27. The chip resistor according to claim 23 , wherein the underlying layer is formed by sputtering. 28. The chip resistor according to claim 23 , wherein the underlying layer is formed of a Ni—Cr alloy. 29. A chip resistor mounting structure comprising: a chip resistor according to claim 1 ; a mounting substrate on which the chip resistor is mounted; and an electroconductive bonding portion disposed between the mounting substrate and the chip resistor. 30. The chip resistor according to claim 1 , wherein the first electrode includes a first conductive plate and a first plated layer formed on the first conductive plate, and the second electrode includes a second conductive plate and a second plated layer formed on the second conductive plate. 31. The chip resistor according to cla

Assignees

Inventors

Classifications

  • H01C1/014Primary

    the resistor being suspended between and being supported by two supporting sections (H01C1/016 takes precedence) · CPC title

  • having edge contacts, e.g. leadless chip capacitors, chip carriers · CPC title

  • Non-printed resistor · CPC title

  • H01C1/012Primary

    the base extending along and imparting rigidity or reinforcement to the resistive element (H01C1/016 takes precedence; the resistive element being formed in two or more coils or loops as a spiral, helical or toroidal winding H01C3/18, H01C3/20; the resistive element being formed as one or more layers or coatings on a base H01C7/00) · CPC title

  • the terminals or tapping points being coated on the resistive element · CPC title

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What does patent US9633768B2 cover?
A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the th…
Who is the assignee on this patent?
Rohm Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01C1/014. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).